@@ -12,6 +12,8 @@
#define PCI_VSEC_ID_INTEL_TBT 0x1234 /* Thunderbolt */
extern const unsigned char pcie_link_speed[];
+extern const char *pci_bus_speed_strings[];
+extern const int pci_bus_speed_strings_size;
extern bool pci_early_dump;
bool pcie_cap_has_lnkctl(const struct pci_dev *dev);
@@ -678,6 +678,36 @@ const unsigned char pcie_link_speed[] = {
PCI_SPEED_UNKNOWN /* F */
};
+/* these strings match up with the values in pci_bus_speed */
+const char *pci_bus_speed_strings[] = {
+ "33 MHz PCI", /* 0x00 */
+ "66 MHz PCI", /* 0x01 */
+ "66 MHz PCI-X", /* 0x02 */
+ "100 MHz PCI-X", /* 0x03 */
+ "133 MHz PCI-X", /* 0x04 */
+ NULL, /* 0x05 */
+ NULL, /* 0x06 */
+ NULL, /* 0x07 */
+ NULL, /* 0x08 */
+ "66 MHz PCI-X 266", /* 0x09 */
+ "100 MHz PCI-X 266", /* 0x0a */
+ "133 MHz PCI-X 266", /* 0x0b */
+ "Unknown AGP", /* 0x0c */
+ "1x AGP", /* 0x0d */
+ "2x AGP", /* 0x0e */
+ "4x AGP", /* 0x0f */
+ "8x AGP", /* 0x10 */
+ "66 MHz PCI-X 533", /* 0x11 */
+ "100 MHz PCI-X 533", /* 0x12 */
+ "133 MHz PCI-X 533", /* 0x13 */
+ "2.5 GT/s PCIe", /* 0x14 */
+ "5.0 GT/s PCIe", /* 0x15 */
+ "8.0 GT/s PCIe", /* 0x16 */
+ "16.0 GT/s PCIe", /* 0x17 */
+ "32.0 GT/s PCIe", /* 0x18 */
+};
+const int pci_bus_speed_strings_size = ARRAY_SIZE(pci_bus_speed_strings);
+
void pcie_update_link_speed(struct pci_bus *bus, u16 linksta)
{
bus->cur_bus_speed = pcie_link_speed[linksta & PCI_EXP_LNKSTA_CLS];
@@ -49,40 +49,11 @@ static ssize_t address_read_file(struct pci_slot *slot, char *buf)
slot->number);
}
-/* these strings match up with the values in pci_bus_speed */
-static const char *pci_bus_speed_strings[] = {
- "33 MHz PCI", /* 0x00 */
- "66 MHz PCI", /* 0x01 */
- "66 MHz PCI-X", /* 0x02 */
- "100 MHz PCI-X", /* 0x03 */
- "133 MHz PCI-X", /* 0x04 */
- NULL, /* 0x05 */
- NULL, /* 0x06 */
- NULL, /* 0x07 */
- NULL, /* 0x08 */
- "66 MHz PCI-X 266", /* 0x09 */
- "100 MHz PCI-X 266", /* 0x0a */
- "133 MHz PCI-X 266", /* 0x0b */
- "Unknown AGP", /* 0x0c */
- "1x AGP", /* 0x0d */
- "2x AGP", /* 0x0e */
- "4x AGP", /* 0x0f */
- "8x AGP", /* 0x10 */
- "66 MHz PCI-X 533", /* 0x11 */
- "100 MHz PCI-X 533", /* 0x12 */
- "133 MHz PCI-X 533", /* 0x13 */
- "2.5 GT/s PCIe", /* 0x14 */
- "5.0 GT/s PCIe", /* 0x15 */
- "8.0 GT/s PCIe", /* 0x16 */
- "16.0 GT/s PCIe", /* 0x17 */
- "32.0 GT/s PCIe", /* 0x18 */
-};
-
static ssize_t bus_speed_read(enum pci_bus_speed speed, char *buf)
{
const char *speed_string;
- if (speed < ARRAY_SIZE(pci_bus_speed_strings))
+ if (speed < pci_bus_speed_strings_size)
speed_string = pci_bus_speed_strings[speed];
else
speed_string = "Unknown";
pci_bus_speed_strings[] in slot.c defines universal speed information. Currently it is only used to decode bus speed in slot.c, while elsewhere use judgement statements repeatly to decode speed information. For example, in PCIE_SPEED2STR and current_link_speed_show() in sysfs. Make it public and move to probe.c so that we can reuse it for decoding speed information even if CONFIG_SYSFS is not set. Add pci_bus_speed_strings_size for boundary check purpose, to avoid acquiring size of an external array by ARRAY_SIZE macro. Link:https://lore.kernel.org/linux-pci/20200205183531.GA229621@google.com/ Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> --- drivers/pci/pci.h | 2 ++ drivers/pci/probe.c | 30 ++++++++++++++++++++++++++++++ drivers/pci/slot.c | 31 +------------------------------ 3 files changed, 33 insertions(+), 30 deletions(-)