| Message ID | 1578883220-28222-1-git-send-email-yangyicong@hisilicon.com |
|---|---|
| State | New |
| Headers | show |
| Series | PCI:add 32 GT/s decoding in some macros | expand |
On Mon, Jan 13, 2020 at 10:40:20AM +0800, Yicong Yang wrote: > Link speed 32.0 GT/s is supported in PCIe r5.0. Add in macro > PCIE_SPEED2STR and PCIE_SPEED2MBS_ENC to correctly decode. > This patch is a complementary to > commit de76cda215d5 ("PCI: Decode PCIe 32 GT/s link speed") Thanks for the patch! Can you please rework current_link_speed_show() (which was updated by de76cda215d5 ("PCI: Decode PCIe 32 GT/s link speed")) so we don't duplicate the strings there and in PCIE_SPEED2STR()? Maybe something like: switch (linkstat & PCI_EXP_LNKSTA_CLS) { case PCI_EXP_LNKSTA_CLS_32_0GB: speed = PCIE_SPEED2STR(PCIE_SPEED_32_0GT); break; ... My goal is to both remove the string duplication and make it more likely that when we add the *next* new speed, we'll catch everything the first time around. Bjorn > Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> > --- > drivers/pci/pci.h | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h > index 3f6947e..2cd64bd 100644 > --- a/drivers/pci/pci.h > +++ b/drivers/pci/pci.h > @@ -288,7 +288,8 @@ void pci_bus_put(struct pci_bus *bus); > > /* PCIe link information */ > #define PCIE_SPEED2STR(speed) \ > - ((speed) == PCIE_SPEED_16_0GT ? "16 GT/s" : \ > + ((speed) == PCIE_SPEED_32_0GT ? "32 GT/s" : \ > + (speed) == PCIE_SPEED_16_0GT ? "16 GT/s" : \ > (speed) == PCIE_SPEED_8_0GT ? "8 GT/s" : \ > (speed) == PCIE_SPEED_5_0GT ? "5 GT/s" : \ > (speed) == PCIE_SPEED_2_5GT ? "2.5 GT/s" : \ > @@ -296,7 +297,8 @@ void pci_bus_put(struct pci_bus *bus); > > /* PCIe speed to Mb/s reduced by encoding overhead */ > #define PCIE_SPEED2MBS_ENC(speed) \ > - ((speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \ > + ((speed) == PCIE_SPEED_32_0GT ? 32000*128/130 : \ > + (speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \ > (speed) == PCIE_SPEED_8_0GT ? 8000*128/130 : \ > (speed) == PCIE_SPEED_5_0GT ? 5000*8/10 : \ > (speed) == PCIE_SPEED_2_5GT ? 2500*8/10 : \ > -- > 2.8.1 >
On 2020/1/14 5:17, Bjorn Helgaas wrote: > On Mon, Jan 13, 2020 at 10:40:20AM +0800, Yicong Yang wrote: >> Link speed 32.0 GT/s is supported in PCIe r5.0. Add in macro >> PCIE_SPEED2STR and PCIE_SPEED2MBS_ENC to correctly decode. >> This patch is a complementary to >> commit de76cda215d5 ("PCI: Decode PCIe 32 GT/s link speed") > Thanks for the patch! Can you please rework current_link_speed_show() > (which was updated by de76cda215d5 ("PCI: Decode PCIe 32 GT/s link > speed")) so we don't duplicate the strings there and in > PCIE_SPEED2STR()? > > Maybe something like: > > switch (linkstat & PCI_EXP_LNKSTA_CLS) { > case PCI_EXP_LNKSTA_CLS_32_0GB: > speed = PCIE_SPEED2STR(PCIE_SPEED_32_0GT); > break; > ... > > My goal is to both remove the string duplication and make it more > likely that when we add the *next* new speed, we'll catch everything > the first time around. > > Bjorn fine. I'll send a v2 patch. thanks Yang > >> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> >> --- >> drivers/pci/pci.h | 6 ++++-- >> 1 file changed, 4 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h >> index 3f6947e..2cd64bd 100644 >> --- a/drivers/pci/pci.h >> +++ b/drivers/pci/pci.h >> @@ -288,7 +288,8 @@ void pci_bus_put(struct pci_bus *bus); >> >> /* PCIe link information */ >> #define PCIE_SPEED2STR(speed) \ >> - ((speed) == PCIE_SPEED_16_0GT ? "16 GT/s" : \ >> + ((speed) == PCIE_SPEED_32_0GT ? "32 GT/s" : \ >> + (speed) == PCIE_SPEED_16_0GT ? "16 GT/s" : \ >> (speed) == PCIE_SPEED_8_0GT ? "8 GT/s" : \ >> (speed) == PCIE_SPEED_5_0GT ? "5 GT/s" : \ >> (speed) == PCIE_SPEED_2_5GT ? "2.5 GT/s" : \ >> @@ -296,7 +297,8 @@ void pci_bus_put(struct pci_bus *bus); >> >> /* PCIe speed to Mb/s reduced by encoding overhead */ >> #define PCIE_SPEED2MBS_ENC(speed) \ >> - ((speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \ >> + ((speed) == PCIE_SPEED_32_0GT ? 32000*128/130 : \ >> + (speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \ >> (speed) == PCIE_SPEED_8_0GT ? 8000*128/130 : \ >> (speed) == PCIE_SPEED_5_0GT ? 5000*8/10 : \ >> (speed) == PCIE_SPEED_2_5GT ? 2500*8/10 : \ >> -- >> 2.8.1 >> > . >
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 3f6947e..2cd64bd 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -288,7 +288,8 @@ void pci_bus_put(struct pci_bus *bus); /* PCIe link information */ #define PCIE_SPEED2STR(speed) \ - ((speed) == PCIE_SPEED_16_0GT ? "16 GT/s" : \ + ((speed) == PCIE_SPEED_32_0GT ? "32 GT/s" : \ + (speed) == PCIE_SPEED_16_0GT ? "16 GT/s" : \ (speed) == PCIE_SPEED_8_0GT ? "8 GT/s" : \ (speed) == PCIE_SPEED_5_0GT ? "5 GT/s" : \ (speed) == PCIE_SPEED_2_5GT ? "2.5 GT/s" : \ @@ -296,7 +297,8 @@ void pci_bus_put(struct pci_bus *bus); /* PCIe speed to Mb/s reduced by encoding overhead */ #define PCIE_SPEED2MBS_ENC(speed) \ - ((speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \ + ((speed) == PCIE_SPEED_32_0GT ? 32000*128/130 : \ + (speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \ (speed) == PCIE_SPEED_8_0GT ? 8000*128/130 : \ (speed) == PCIE_SPEED_5_0GT ? 5000*8/10 : \ (speed) == PCIE_SPEED_2_5GT ? 2500*8/10 : \
Link speed 32.0 GT/s is supported in PCIe r5.0. Add in macro PCIE_SPEED2STR and PCIE_SPEED2MBS_ENC to correctly decode. This patch is a complementary to commit de76cda215d5 ("PCI: Decode PCIe 32 GT/s link speed") Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> --- drivers/pci/pci.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 2.8.1