From patchwork Mon Nov 27 16:58:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sinan Kaya X-Patchwork-Id: 841755 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=codeaurora.org header.i=@codeaurora.org header.b="kYKe6jly"; dkim=pass (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="js7kU1ss"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yltN53V25z9sRW for ; Tue, 28 Nov 2017 04:00:37 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932109AbdK0RAg (ORCPT ); Mon, 27 Nov 2017 12:00:36 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:33946 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753597AbdK0RAI (ORCPT ); Mon, 27 Nov 2017 12:00:08 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id E64A06A565; Mon, 27 Nov 2017 16:59:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511802008; bh=rxaD+yOaA/5Kqp2kvcCUhSGGmnPlcnSGvRo668SJ4U4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kYKe6jlyiysUdTwoU+3P3FdkKrkuBbCsJJuvBCj0/4aVAMCbpBlqViYA8LGjw1BvK ekgDPM3khd6v7x8DzUbEhYltUoSglgzBwK/N3Tkf4P1S79NPu1jmtdS4gmKYRz8vPP mtB+f0lLyLY1YriiGVkcUvMJz4Cw/W6lNDn8UzTw= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from drakthul.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: okaya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 33EB56A6CB; Mon, 27 Nov 2017 16:59:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511801975; bh=rxaD+yOaA/5Kqp2kvcCUhSGGmnPlcnSGvRo668SJ4U4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=js7kU1ssgzpnRDzz43p9XgJpcpzqLzsbNIsDjeEG3O9heStl3V0UmLvJDCO603Fd5 g9heYMWj6U442sTtCJVtC+YzW88E4pVHOK7jesCcmuX1rcmhMLXtAiYqusjbAz8ooA K7HG0w5HqilU1VuZQp1ACsghf5I7yzG0gKTdwaX8= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 33EB56A6CB Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org From: Sinan Kaya To: linux-pci@vger.kernel.org, timur@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, intel-gfx@lists.freedesktop.org, Sinan Kaya , Antonino Daplas , Bartlomiej Zolnierkiewicz , linux-fbdev@vger.kernel.org (open list:NVIDIA (rivafb and nvidiafb) FRAMEBUFFER DRIVER), linux-kernel@vger.kernel.org (open list) Subject: [PATCH V3 26/29] video: fbdev: nvidia: deprecate pci_get_bus_and_slot() Date: Mon, 27 Nov 2017 11:58:03 -0500 Message-Id: <1511801886-6753-27-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1511801886-6753-1-git-send-email-okaya@codeaurora.org> References: <1511801886-6753-1-git-send-email-okaya@codeaurora.org> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as where a PCI device is present. This restricts the device drivers to be reused for other domain numbers. Getting ready to remove pci_get_bus_and_slot() function in favor of pci_get_domain_bus_and_slot(). struct nvidia_par has a pointer to struct pci_dev. Use the pci_dev member to extract the domain information and pass it to pci_get_domain_bus_and_slot() function. Signed-off-by: Sinan Kaya --- drivers/video/fbdev/nvidia/nv_hw.c | 11 ++++++----- drivers/video/fbdev/nvidia/nv_setup.c | 3 ++- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/video/fbdev/nvidia/nv_hw.c b/drivers/video/fbdev/nvidia/nv_hw.c index 81c80ac..8335da4 100644 --- a/drivers/video/fbdev/nvidia/nv_hw.c +++ b/drivers/video/fbdev/nvidia/nv_hw.c @@ -683,10 +683,11 @@ static void nForceUpdateArbitrationSettings(unsigned VClk, nv10_sim_state sim_data; unsigned int M, N, P, pll, MClk, NVClk, memctrl; struct pci_dev *dev; + int domain = pci_domain_nr(par->pci_dev->bus); if ((par->Chipset & 0x0FF0) == 0x01A0) { unsigned int uMClkPostDiv; - dev = pci_get_bus_and_slot(0, 3); + dev = pci_get_domain_bus_and_slot(domain, 0, 3); pci_read_config_dword(dev, 0x6C, &uMClkPostDiv); uMClkPostDiv = (uMClkPostDiv >> 8) & 0xf; @@ -694,7 +695,7 @@ static void nForceUpdateArbitrationSettings(unsigned VClk, uMClkPostDiv = 4; MClk = 400000 / uMClkPostDiv; } else { - dev = pci_get_bus_and_slot(0, 5); + dev = pci_get_domain_bus_and_slot(domain, 0, 5); pci_read_config_dword(dev, 0x4c, &MClk); MClk /= 1000; } @@ -707,13 +708,13 @@ static void nForceUpdateArbitrationSettings(unsigned VClk, sim_data.pix_bpp = (char)pixelDepth; sim_data.enable_video = 0; sim_data.enable_mp = 0; - dev = pci_get_bus_and_slot(0, 1); + dev = pci_get_domain_bus_and_slot(domain, 0, 1); pci_read_config_dword(dev, 0x7C, &sim_data.memory_type); pci_dev_put(dev); sim_data.memory_type = (sim_data.memory_type >> 12) & 1; sim_data.memory_width = 64; - dev = pci_get_bus_and_slot(0, 3); + dev = pci_get_domain_bus_and_slot(domain, 0, 3); pci_read_config_dword(dev, 0, &memctrl); pci_dev_put(dev); memctrl >>= 16; @@ -721,7 +722,7 @@ static void nForceUpdateArbitrationSettings(unsigned VClk, if ((memctrl == 0x1A9) || (memctrl == 0x1AB) || (memctrl == 0x1ED)) { u32 dimm[3]; - dev = pci_get_bus_and_slot(0, 2); + dev = pci_get_domain_bus_and_slot(domain, 0, 2); pci_read_config_dword(dev, 0x40, &dimm[0]); dimm[0] = (dimm[0] >> 8) & 0x4f; pci_read_config_dword(dev, 0x44, &dimm[1]); diff --git a/drivers/video/fbdev/nvidia/nv_setup.c b/drivers/video/fbdev/nvidia/nv_setup.c index 2f2e162..b17acd2 100644 --- a/drivers/video/fbdev/nvidia/nv_setup.c +++ b/drivers/video/fbdev/nvidia/nv_setup.c @@ -264,7 +264,8 @@ static void nv10GetConfig(struct nvidia_par *par) } #endif - dev = pci_get_bus_and_slot(0, 1); + dev = pci_get_domain_bus_and_slot(pci_domain_nr(par->pci_dev->bus), + 0, 1); if ((par->Chipset & 0xffff) == 0x01a0) { u32 amt;