From patchwork Fri Nov 4 12:59:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 691258 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3t9MRC0Dw4z9vFw for ; Sat, 5 Nov 2016 00:01:27 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="NZyBYc1n"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934706AbcKDNAP (ORCPT ); Fri, 4 Nov 2016 09:00:15 -0400 Received: from mail-wm0-f46.google.com ([74.125.82.46]:36937 "EHLO mail-wm0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934672AbcKDM74 (ORCPT ); Fri, 4 Nov 2016 08:59:56 -0400 Received: by mail-wm0-f46.google.com with SMTP id t79so48425339wmt.0 for ; Fri, 04 Nov 2016 05:59:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XKGo/WvZEwkHdlAzgG04tCKMipDLEW+XKFcNtEfL5TI=; b=NZyBYc1nYN8Y7bx1DIopuUlHjMx1N2nJ1JDpo4HRD9bxqDER+0U6LGVMXzFEdV+B+k /z6PAUyADLmYMajwqfS3nBPBSoXXCvh55wpJx7SjIi2sEZIeYsfzP6ApEsZpKsGqv8dW bq2pd23y1kIFIsksk5n0XniL0JgJgjIY3qCyI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XKGo/WvZEwkHdlAzgG04tCKMipDLEW+XKFcNtEfL5TI=; b=OtitfjMBIS/ckCGkZ3bbwMI65vTJxwl8ppI851pKOVPG07LA6x2Pfmlw0a9fc9XNX/ HeZaUBBXe0Mvrp7rfinXGjlrMb0bzoxwQjEa4K8MJD1jv2pj7PjzWEimIhfT36+Zet2w LIiITVfUaDNC2FgFSi+PSK0qoPtngXRkcRqgM7+rleghexneh4juDIc0tFUWJZWWwanT V6jF7lLea7hdoCR8ZDozvkVd4rrq6vdJ+SZnk9+CQqowf5m2sgZCD6fmbcoh3MH0axXm l3C2HG2ZNck0/d46e2qXKVgudpvPB8ACLrn0knEGWJAb7mHr36oajxXHOn3fDgdqFbAL m6Cw== X-Gm-Message-State: ABUngvfvM4nu+T3a3bpRGTW8CRT2LahHpD79oO+GIPsvVtbBawvy6UpoxarJy7sQdsXhd3ol X-Received: by 10.28.52.76 with SMTP id b73mr3178966wma.8.1478264394876; Fri, 04 Nov 2016 05:59:54 -0700 (PDT) Received: from localhost.localdomain (host-2-98-102-117.as13285.net. [2.98.102.117]) by smtp.gmail.com with ESMTPSA id e5sm4486220wma.10.2016.11.04.05.59.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 04 Nov 2016 05:59:54 -0700 (PDT) From: Srinivas Kandagatla To: svarbanov@mm-sol.com, Bjorn Helgaas , linux-pci@vger.kernel.org Cc: Rob Herring , Mark Rutland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v3 3/3] PCI: qcom: add runtime pm support to pcie_port Date: Fri, 4 Nov 2016 12:59:47 +0000 Message-Id: <1478264387-17914-4-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1478264387-17914-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1478264387-17914-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This patch is required when the pcie controller sits on a bus with its own power domain and clocks which are controlled via a bus driver like simple pm bus. As these bus driver have runtime pm enabled, it makes sense to update the usage counter so that the runtime pm does not suspend the clks or power domain associated with the bus driver. Signed-off-by: Srinivas Kandagatla --- drivers/pci/host/pcie-qcom.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pci/host/pcie-qcom.c b/drivers/pci/host/pcie-qcom.c index f37c690..3751635 100644 --- a/drivers/pci/host/pcie-qcom.c +++ b/drivers/pci/host/pcie-qcom.c @@ -587,6 +587,9 @@ static void qcom_pcie_host_init(struct pcie_port *pp) struct qcom_pcie *pcie = to_qcom_pcie(pp); int ret; + + pm_runtime_get_sync(pp->dev); + qcom_ep_reset_assert(pcie); ret = pcie->ops->init(pcie); @@ -617,6 +620,7 @@ static void qcom_pcie_host_init(struct pcie_port *pp) phy_power_off(pcie->phy); err_deinit: pcie->ops->deinit(pcie); + pm_runtime_put_sync(pp->dev); } static int qcom_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, @@ -669,10 +673,12 @@ static int qcom_pcie_probe(struct platform_device *pdev) struct pcie_port *pp; int ret; + pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); if (!pcie) return -ENOMEM; + pm_runtime_enable(dev); pp = &pcie->pp; pcie->ops = (struct qcom_pcie_ops *)of_device_get_match_data(dev);