From patchwork Fri Apr 15 17:06:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Nowicki X-Patchwork-Id: 611061 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qmkYQ1tTvz9sBG for ; Sat, 16 Apr 2016 03:09:46 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=semihalf-com.20150623.gappssmtp.com header.i=@semihalf-com.20150623.gappssmtp.com header.b=z2NFCO6e; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752735AbcDORJo (ORCPT ); Fri, 15 Apr 2016 13:09:44 -0400 Received: from mail-wm0-f51.google.com ([74.125.82.51]:35426 "EHLO mail-wm0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753172AbcDORHi (ORCPT ); Fri, 15 Apr 2016 13:07:38 -0400 Received: by mail-wm0-f51.google.com with SMTP id a140so40059229wma.0 for ; Fri, 15 Apr 2016 10:07:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=n0mdbDZ/711TKQgX/NnZpzBOplAE4QNrOtsPtz8KUNc=; b=z2NFCO6eMkaaVdIuRG+cRlqoh9k3QczQKV67DyK5//GTrtULoGtD+aC6pEJEnHtXRF yXGzLQ4mfuEGON/XQ+ZsHU0p+hvXcoIxNeHeikCFHgITCzTkzk0FZTBGBT2UoWiGo1xp tFZjzChEqfXL22ejcbzBPwSmZJju1t5j2Lsg8xH5UZ0eawnVcXtFNijTaLkeT0Vl6nYB x1TEu9APkuTZ5em3Etly1j2XWaQpL2va7AgxtQFcJUWCBwtCZ5KgV+JxrKayFW2PMZrk hw5cSswSOt7PJFrwTHnBUtMKW/J1D8cBWOwAAmO/ZF5Ds7PedN181XGJijkI2WXAl8co MvtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=n0mdbDZ/711TKQgX/NnZpzBOplAE4QNrOtsPtz8KUNc=; b=SXx6e77BrX5gKY8Jp/NCqaXcqRStYCz3Sk+eDZXyLBJbUntkclHcSlRaCTsprU3dWU Y1Ar9QI4kXzx5/nRHkk43KLPZtSCoqyrEydiSyOI6KLPqoQS8TxEsLhvOW02kTMfyPdS pTA68tR/v1cIgUC5UJSMX2AusgYN9AYMQEcStcM5PdohUKL3ERy2/PhpTshYEWpUy02t 8NXlO4ufbInFYssXi/tTqVylyirwnbEl1WMwgbMe8W4Hea9Jt9k+ZDij6KQ6VSIe7I0m tQYesv2KWXADUdXfPmQnSF8dJX6S9gmc539Xt2VgKnZRO7PLWRgXexJmOeCwYAvsWV3P 8r3Q== X-Gm-Message-State: AOPr4FWqhQZMWdpFo1kOX/w92TpxBqLonUz+C8VrHIpYYe6xBXSGFuwAIBaP7Ophltz/SQ== X-Received: by 10.194.23.65 with SMTP id k1mr17104296wjf.31.1460740056944; Fri, 15 Apr 2016 10:07:36 -0700 (PDT) Received: from tn-HP-4.semihalf.local (cardhu.semihalf.com. [213.17.239.108]) by smtp.gmail.com with ESMTPSA id gr4sm14282723wjd.23.2016.04.15.10.07.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 15 Apr 2016 10:07:36 -0700 (PDT) From: Tomasz Nowicki To: helgaas@kernel.org, arnd@arndb.de, will.deacon@arm.com, catalin.marinas@arm.com, rafael@kernel.org, hanjun.guo@linaro.org, Lorenzo.Pieralisi@arm.com, okaya@codeaurora.org, jiang.liu@linux.intel.com, jchandra@broadcom.com Cc: robert.richter@caviumnetworks.com, mw@semihalf.com, Liviu.Dudau@arm.com, ddaney@caviumnetworks.com, wangyijing@huawei.com, Suravee.Suthikulpanit@amd.com, msalter@redhat.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org, jcm@redhat.com, Tomasz Nowicki Subject: [PATCH V6 12/13] pci, pci-thunder-ecam: Add ACPI support for ThunderX ECAM. Date: Fri, 15 Apr 2016 19:06:47 +0200 Message-Id: <1460740008-19489-13-git-send-email-tn@semihalf.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1460740008-19489-1-git-send-email-tn@semihalf.com> References: <1460740008-19489-1-git-send-email-tn@semihalf.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Passes 1.x miss PCI enhanced allocation (EA) header for fixed-BARs, thus these passes should use Cavium-specific config access functions that synthesize the missing EA capabilities. We already have DT driver which addresses errata requirements and allows to use special PCI config accessors. Currently this driver uses compatible = "cavium,pci-host-thunder-ecam" to mach against the errata. For ACPI case we need explicit errata number and corresponding DECLARE_ACPI_MCFG_FIXUP fixup code. Signed-off-by: Tomasz Nowicki --- arch/arm64/Kconfig | 14 ++++++++++++++ arch/arm64/include/asm/cpufeature.h | 3 ++- arch/arm64/kernel/cpu_errata.c | 8 ++++++++ drivers/pci/host/pci-thunder-ecam.c | 35 +++++++++++++++++++++++++++++++++++ 4 files changed, 59 insertions(+), 1 deletion(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 1bded87..b7614b8 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -445,6 +445,20 @@ config CAVIUM_ERRATUM_27456 If unsure, say Y. +config CAVIUM_ERRATUM_24575 + bool "Cavium erratum 24575: Enhanced Allocation (EA) emualaion" + default y + help + Enable workaround for erratum 24575. + + Early versions of the Cavium Thunder CN88XX processor are missing + Enhanced Allocation (EA) capabilities for the fixed BAR addresses used + by the on-SoC hardware blocks. The erratum adds config access + functions that synthesize the missing EA capabilities for versions + that are missing that information. + + If unsure, say Y. + endmenu diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index b9b6494..a78364e 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -35,8 +35,9 @@ #define ARM64_ALT_PAN_NOT_UAO 10 #define ARM64_HAS_VIRT_HOST_EXTN 11 #define ARM64_WORKAROUND_CAVIUM_27456 12 +#define ARM64_WORKAROUND_CAVIUM_24575 13 -#define ARM64_NCAPS 13 +#define ARM64_NCAPS 14 #ifndef __ASSEMBLY__ diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 06afd04..89c13d7 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -97,6 +97,14 @@ const struct arm64_cpu_capabilities arm64_errata[] = { (1 << MIDR_VARIANT_SHIFT) | 1), }, #endif +#ifdef CONFIG_CAVIUM_ERRATUM_24575 + { + /* Cavium ThunderX, pass 1.x */ + .desc = "Cavium erratum 24575", + .capability = ARM64_WORKAROUND_CAVIUM_24575, + MIDR_RANGE(MIDR_THUNDERX, 0x00, 0x01), + }, +#endif { } }; diff --git a/drivers/pci/host/pci-thunder-ecam.c b/drivers/pci/host/pci-thunder-ecam.c index f67c6d7..01de697 100644 --- a/drivers/pci/host/pci-thunder-ecam.c +++ b/drivers/pci/host/pci-thunder-ecam.c @@ -11,10 +11,14 @@ #include #include #include +#include #include +#include + #include "../ecam.h" + static void set_val(u32 v, int where, int size, u32 *val) { int shift = (where & 3) * 8; @@ -376,5 +380,36 @@ static struct platform_driver thunder_ecam_driver = { }; module_platform_driver(thunder_ecam_driver); +#ifdef CONFIG_ACPI + +static bool needs_cavium_erratum_24575(struct pci_cfg_fixup *fixup, + struct acpi_pci_root *root) +{ + /* + * We must match errata code and be hypervisor, quirk does not apply + * for virtual machines. + */ + return cpus_have_cap(ARM64_WORKAROUND_CAVIUM_24575) && + is_hyp_mode_available(); +} + +DECLARE_ACPI_MCFG_FIXUP(NULL, needs_cavium_erratum_24575, &pci_thunder_ecam_ops, + 0, PCI_MCFG_BUS_ANY); +DECLARE_ACPI_MCFG_FIXUP(NULL, needs_cavium_erratum_24575, &pci_thunder_ecam_ops, + 1, PCI_MCFG_BUS_ANY); +DECLARE_ACPI_MCFG_FIXUP(NULL, needs_cavium_erratum_24575, &pci_thunder_ecam_ops, + 2, PCI_MCFG_BUS_ANY); +DECLARE_ACPI_MCFG_FIXUP(NULL, needs_cavium_erratum_24575, &pci_thunder_ecam_ops, + 3, PCI_MCFG_BUS_ANY); +DECLARE_ACPI_MCFG_FIXUP(NULL, needs_cavium_erratum_24575, &pci_thunder_ecam_ops, + 10, PCI_MCFG_BUS_ANY); +DECLARE_ACPI_MCFG_FIXUP(NULL, needs_cavium_erratum_24575, &pci_thunder_ecam_ops, + 11, PCI_MCFG_BUS_ANY); +DECLARE_ACPI_MCFG_FIXUP(NULL, needs_cavium_erratum_24575, &pci_thunder_ecam_ops, + 12, PCI_MCFG_BUS_ANY); +DECLARE_ACPI_MCFG_FIXUP(NULL, needs_cavium_erratum_24575, &pci_thunder_ecam_ops, + 13, PCI_MCFG_BUS_ANY); +#endif + MODULE_DESCRIPTION("Thunder ECAM PCI host driver"); MODULE_LICENSE("GPL v2");