From patchwork Thu Feb 4 17:29:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Nowicki X-Patchwork-Id: 579045 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 8111D1402C9 for ; Fri, 5 Feb 2016 04:30:20 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=semihalf-com.20150623.gappssmtp.com header.i=@semihalf-com.20150623.gappssmtp.com header.b=gIOMgQIa; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966625AbcBDR3v (ORCPT ); Thu, 4 Feb 2016 12:29:51 -0500 Received: from mail-wm0-f50.google.com ([74.125.82.50]:33316 "EHLO mail-wm0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966603AbcBDR3r (ORCPT ); Thu, 4 Feb 2016 12:29:47 -0500 Received: by mail-wm0-f50.google.com with SMTP id g62so15110027wme.0 for ; Thu, 04 Feb 2016 09:29:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YUN1zLvppOHs8fSzT07nuOiM2CfS0aAOP0759wCfQP0=; b=gIOMgQIam5TxNX0I9B9qBtvlzqZejctz6NBAlLrK9uXDVurzmFkYJQPZLtXio1Hrr7 +YtNIX26LBP6kfMtbrMHNOJdC2uDjikBkycXUiNe7A5eK9lGWHOm4O43M4fYJxuKZpl1 NLDs2rvjx02Zox3eVAwdeSw5WrjOgaokMZpfuhwt5fPJtTG/9gqKfblfmgz3up/1cXbr E++E7DroG6h+XE1zv4vxXGByOVMYi919pQipjWwmYBXaF6tEoPmh62IiZZWXFDJJb8SS AKEeO+KNBZmJB7QU/Kp+3ooIjw3I4VKAOrYtldT4t7/4FJRu0FmU/uisXbhtvYAOccJx QBhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YUN1zLvppOHs8fSzT07nuOiM2CfS0aAOP0759wCfQP0=; b=lYJNtU6/SNeE+5uxhOLRoN4Bup5o0IZMo0RK8ClzFTMZ5OdIiB2P5lV0//S/rNfdCS 0vcDphT6/Cw2ccUOxNmMwZcIV77RDG3/SX1UUt8r0gi2Htp56flHTgaWZbePTj8F/NQz iO0d0KAi4WFIWsK36LhzCm5/omMOWHTmuZyrcC22Tz/AcGZjHLW/haa8izWIOgrD3v8n T6CbRWJBqgPcq3iW1oq6YVeRmbmulPYNcEg+3EGM+IQnquXl/7DgA9l9Nyyd6ejverb7 UmEgM03olJjNCenf80Dd1EDDDz1T75vPt35LEpuj7Ndn9/yjv/UHIEDhOkL30WvDtWOu xcnQ== X-Gm-Message-State: AG10YOTNiiztzkgjo5OqG/UEE+5m/0XQO2B3Ev9HGbuCXZdN8n5IDxgVQYUJMj/zsweuKQ== X-Received: by 10.28.1.196 with SMTP id 187mr8627923wmb.68.1454606986235; Thu, 04 Feb 2016 09:29:46 -0800 (PST) Received: from tn-HP-4.semihalf.local (cardhu.semihalf.com. [213.17.239.108]) by smtp.gmail.com with ESMTPSA id w8sm12238889wjx.21.2016.02.04.09.29.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 04 Feb 2016 09:29:45 -0800 (PST) From: Tomasz Nowicki To: bhelgaas@google.com, arnd@arndb.de, will.deacon@arm.com, catalin.marinas@arm.com, rjw@rjwysocki.net, hanjun.guo@linaro.org, Lorenzo.Pieralisi@arm.com, okaya@codeaurora.org, jiang.liu@linux.intel.com, Stefano.Stabellini@eu.citrix.com Cc: robert.richter@caviumnetworks.com, mw@semihalf.com, Liviu.Dudau@arm.com, ddaney@caviumnetworks.com, wangyijing@huawei.com, Suravee.Suthikulpanit@amd.com, msalter@redhat.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org, jchandra@broadcom.com, jcm@redhat.com, Tomasz Nowicki Subject: [PATCH V4 22/23] arm64, pci, acpi: Assign legacy IRQs once device is enable. Date: Thu, 4 Feb 2016 18:29:00 +0100 Message-Id: <1454606941-9523-23-git-send-email-tn@semihalf.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1454606941-9523-1-git-send-email-tn@semihalf.com> References: <1454606941-9523-1-git-send-email-tn@semihalf.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This is the last step before enabling generic ACPI PCI host controller for ARM64. We need to take care of legacy IRQ mapping for non-MSI(X) PCI devices. pcibios_enable_device() boot order is not sensitive to ACPI device enumeration, so it is the best place to assign device's IRQs. NOTE: *This is going to be temporary solution*. There is ongoing work which aims for cleaning legacy IRQ allocation, see [1]. We can consider this patch as the necessary evil which will be removed once [1] series hits mailnline in the near future. 1. http://comments.gmane.org/gmane.linux.kernel.pci/46461 Signed-off-by: Tomasz Nowicki --- arch/arm64/kernel/pci.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c index 023b983..d1a701f 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c @@ -39,16 +39,26 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res, } /** - * pcibios_enable_device - Enable I/O and memory. + * pcibios_enable_device - Enable I/O, memory and legacy IRQs for ACPI. * @dev: PCI device to be enabled * @mask: bitmask of BARs to enable */ int pcibios_enable_device(struct pci_dev *dev, int mask) { + int ret; + if (pci_has_flag(PCI_PROBE_ONLY)) return 0; - return pci_enable_resources(dev, mask); + ret = pci_enable_resources(dev, mask); + if (ret < 0) + return ret; + +#ifdef CONFIG_ACPI + if (!pci_dev_msi_enabled(dev)) + return acpi_pci_irq_enable(dev); +#endif + return 0; } /*