From patchwork Wed Dec 16 15:16:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Nowicki X-Patchwork-Id: 557508 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id E299C1402D2 for ; Thu, 17 Dec 2015 02:19:33 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=semihalf-com.20150623.gappssmtp.com header.i=@semihalf-com.20150623.gappssmtp.com header.b=Tuqa92MJ; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933927AbbLPPTO (ORCPT ); Wed, 16 Dec 2015 10:19:14 -0500 Received: from mail-wm0-f54.google.com ([74.125.82.54]:37925 "EHLO mail-wm0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933908AbbLPPSS (ORCPT ); Wed, 16 Dec 2015 10:18:18 -0500 Received: by mail-wm0-f54.google.com with SMTP id l126so42586837wml.1 for ; Wed, 16 Dec 2015 07:18:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JoXf8pj/pXyMPjSaDIs5+hx3GlYJ3sg54U7e29fKXQM=; b=Tuqa92MJ7VEFxHEblIMUIDQmKXF+xaEtJlAiQfy6N7pYm0kthcBb/o8OKdVtsnnlg5 7KSsl8NDSn1Km6wKG7XxlL6XUtUBPSW9Ao6rRt5acL+dz/bcKzkf0Ixm+VEqw6vwfDOM OG+D3mPPTozEKO9CN6liUtytYIkRfUVoFWZEy62VNRYu0wvWLgEJDj+Et4PDAoBKINRY BZD9x1d4K1eln4T3wGBDhsfv9XLpd9aiiMu5EI1tLrK9BJMPNOUEdzWZxh9cx8xD9z06 mQiZJSH0mmMYU0KHSUWhf0ZxX2gqK/IQzBZfDjpz8AodzOEm8oSdU+Dumof9JQ/4werl J/Rw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JoXf8pj/pXyMPjSaDIs5+hx3GlYJ3sg54U7e29fKXQM=; b=E27EEjkx0Dv/pzFu+YcbNTXi83CdnEOEdDUZhHjxyIBIC2/bYKbeNxSd1MM8ggk9qL ZkCalS2qLRdB2rEhP/ohcImpqIrGWcEBdWysho7EaSW6PSjfvFrQFn/r7w2TKSdC9Rsf zGMcbC4BujncBpfvxoeYZTSOl3xDlSHhn53Cyuh07SuH9kNBehOkQj3fquPzDMH7MI7f kEeg/aufXtyS5tPXvF4pnV0YZmioKDr7EeK0nsOB4BGBkqawEeuoNkf1lmgkKfD6JIf5 SB3m/0fPbj0FY83tP2nkakWqSti6va/BGiiJFvYmLnuP92rWXfvQ0TCzMSfZmL3UePVH G28A== X-Gm-Message-State: ALoCoQncwQm4zTRB9qn8d+AyWb7V0zj5QpwfAt7KtiNEMuHFTPfmci9rujCek1JCateBfMb2aCwS9JTVpdkronVcQZTU1AjFmA== X-Received: by 10.28.107.26 with SMTP id g26mr12632873wmc.34.1450279097301; Wed, 16 Dec 2015 07:18:17 -0800 (PST) Received: from tn-HP-4.semihalf.local ([80.82.22.190]) by smtp.gmail.com with ESMTPSA id z17sm6438761wjq.1.2015.12.16.07.18.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 16 Dec 2015 07:18:16 -0800 (PST) From: Tomasz Nowicki To: bhelgaas@google.com, arnd@arndb.de, will.deacon@arm.com, catalin.marinas@arm.com, rjw@rjwysocki.net, hanjun.guo@linaro.org, Lorenzo.Pieralisi@arm.com, okaya@codeaurora.org, jiang.liu@linux.intel.com, Stefano.Stabellini@eu.citrix.com Cc: robert.richter@caviumnetworks.com, mw@semihalf.com, Liviu.Dudau@arm.com, ddaney@caviumnetworks.com, tglx@linutronix.de, wangyijing@huawei.com, Suravee.Suthikulpanit@amd.com, msalter@redhat.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org, jchandra@broadcom.com, jcm@redhat.com, Tomasz Nowicki Subject: [PATCH V2 21/23] pci, acpi: Support for ACPI based PCI hostbridge init Date: Wed, 16 Dec 2015 16:16:31 +0100 Message-Id: <1450278993-12664-22-git-send-email-tn@semihalf.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1450278993-12664-1-git-send-email-tn@semihalf.com> References: <1450278993-12664-1-git-send-email-tn@semihalf.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Because of two patch series: 1. Jiang Liu's common interface to support PCI host bridge init 2. MMCONFIG refactoring (part of this patch set) now we can think about generic ACPI based PCI host bridge driver out of arch/ directory. This driver use information from MCFG table (PCI config space regions) and _CRS method (IO/irq resources) to initialize PCI hostbridge. TBD: We are still not sure whether we should reassign resources after PCI bus enumeration or trust firmware to do all that work for us properly. Signed-off-by: Tomasz Nowicki Signed-off-by: Hanjun Guo Signed-off-by: Suravee Suthikulpanit CC: Arnd Bergmann CC: Catalin Marinas CC: Liviu Dudau CC: Lorenzo Pieralisi CC: Will Deacon Tested-by: Suravee Suthikulpanit --- drivers/pci/host/Kconfig | 6 ++ drivers/pci/host/Makefile | 1 + drivers/pci/host/pci-host-acpi.c | 138 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 145 insertions(+) create mode 100644 drivers/pci/host/pci-host-acpi.c diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig index f131ba9..0e5e339 100644 --- a/drivers/pci/host/Kconfig +++ b/drivers/pci/host/Kconfig @@ -60,6 +60,12 @@ config PCI_HOST_GENERIC Say Y here if you want to support a simple generic PCI host controller, such as the one emulated by kvmtool. +config PCI_HOST_GENERIC_ACPI + bool "Generic ACPI PCI host controller" + depends on ACPI && ARCH_PCI_HOST_GENERIC_ACPI + help + Say Y here if you want to support generic ACPI PCI host controller. + config PCIE_SPEAR13XX bool "STMicroelectronics SPEAr PCIe controller" depends on ARCH_SPEAR13XX diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile index 9d4d3c6..9117894 100644 --- a/drivers/pci/host/Makefile +++ b/drivers/pci/host/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_PCI_TEGRA) += pci-tegra.o obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o obj-$(CONFIG_PCI_RCAR_GEN2_PCIE) += pcie-rcar.o obj-$(CONFIG_PCI_HOST_GENERIC) += pci-host-generic.o +obj-$(CONFIG_PCI_HOST_GENERIC_ACPI) += pci-host-acpi.o obj-$(CONFIG_PCIE_SPEAR13XX) += pcie-spear13xx.o obj-$(CONFIG_PCI_KEYSTONE) += pci-keystone-dw.o pci-keystone.o obj-$(CONFIG_PCIE_XILINX) += pcie-xilinx.o diff --git a/drivers/pci/host/pci-host-acpi.c b/drivers/pci/host/pci-host-acpi.c new file mode 100644 index 0000000..29175f5 --- /dev/null +++ b/drivers/pci/host/pci-host-acpi.c @@ -0,0 +1,138 @@ +/* + * ACPI based generic PCI host controller driver + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + * Copyright (C) 2015 Semihalf + * Author: Tomasz Nowicki + */ + +#include +#include +#include +#include +#include + +static int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + if (pci_dev_msi_enabled(dev)) + return 0; + + return acpi_pci_irq_enable(dev); +} + +int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) +{ + bridge->map_irq = pcibios_map_irq; + return 0; +} + +static void pci_mcfg_release_info(struct acpi_pci_root_info *ci) +{ + pci_mmcfg_teardown_map(ci); + kfree(ci); +} + +static int pci_acpi_root_prepare_resources(struct acpi_pci_root_info *ci) +{ + struct resource_entry *entry, *tmp; + int ret; + + ret = acpi_pci_probe_root_resources(ci); + if (ret <= 0) + return ret; + + resource_list_for_each_entry_safe(entry, tmp, &ci->resources) { + struct resource *res = entry->res; + + /* + * TODO: need to move pci_register_io_range() function out + * of drivers/of/address.c for both used by DT and ACPI + */ + if (res->flags & IORESOURCE_IO) { + resource_size_t cpu_addr = res->start + entry->offset; + resource_size_t pci_addr = res->start; + resource_size_t length = res->end - res->start; + unsigned long port; + int err; + + err = pci_register_io_range(cpu_addr, length); + if (err) { + resource_list_destroy_entry(entry); + continue; + } + + port = pci_address_to_pio(cpu_addr); + if (port == (unsigned long)-1) { + resource_list_destroy_entry(entry); + continue; + } + + res->start = port; + res->end = port + length; + entry->offset = port - pci_addr; + + if (pci_remap_iospace(res, cpu_addr) < 0) + resource_list_destroy_entry(entry); + } + } + + return ret; +} + +static struct acpi_pci_root_ops acpi_pci_root_ops = { + .init_info = pci_mmcfg_setup_map, + .release_info = pci_mcfg_release_info, + .prepare_resources = pci_acpi_root_prepare_resources, +}; + +/* Root bridge scanning */ +struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) +{ + int node = acpi_get_node(root->device->handle); + int domain = root->segment; + int busnum = root->secondary.start; + struct acpi_pci_root_info *info; + struct pci_bus *bus; + + if (domain && !pci_domains_supported) { + pr_warn("PCI %04x:%02x: multiple domains not supported.\n", + domain, busnum); + return NULL; + } + + info = kzalloc_node(sizeof(*info), GFP_KERNEL, node); + if (!info) { + dev_err(&root->device->dev, + "pci_bus %04x:%02x: ignored (out of memory)\n", + domain, busnum); + return NULL; + } + + acpi_pci_root_ops.pci_ops = pci_mcfg_get_ops(domain, busnum); + bus = acpi_pci_root_create(root, &acpi_pci_root_ops, info, root); + + /* After the PCI-E bus has been walked and all devices discovered, + * configure any settings of the fabric that might be necessary. + */ + if (bus) { + struct pci_bus *child; + pci_bus_size_bridges(bus); + pci_bus_assign_resources(bus); + + list_for_each_entry(child, &bus->children, node) + pcie_bus_configure_settings(child); + } + + return bus; +}