From patchwork Mon Feb 9 15:22:29 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suravee Suthikulpanit X-Patchwork-Id: 437965 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 13A2914014D for ; Tue, 10 Feb 2015 02:38:28 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760742AbbBIPi0 (ORCPT ); Mon, 9 Feb 2015 10:38:26 -0500 Received: from mail-by2on0147.outbound.protection.outlook.com ([207.46.100.147]:45413 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1760141AbbBIPi0 (ORCPT ); Mon, 9 Feb 2015 10:38:26 -0500 X-Greylist: delayed 922 seconds by postgrey-1.27 at vger.kernel.org; Mon, 09 Feb 2015 10:38:26 EST Received: from BN1PR02CA0030.namprd02.prod.outlook.com (10.141.56.30) by CO1PR02MB207.namprd02.prod.outlook.com (10.242.165.145) with Microsoft SMTP Server (TLS) id 15.1.75.20; Mon, 9 Feb 2015 15:23:12 +0000 Received: from BN1BFFO11FD006.protection.gbl (2a01:111:f400:7c10::1:127) by BN1PR02CA0030.outlook.office365.com (2a01:111:e400:2a::30) with Microsoft SMTP Server (TLS) id 15.1.81.19 via Frontend Transport; Mon, 9 Feb 2015 15:23:11 +0000 Received: from atltwp01.amd.com (165.204.84.221) by BN1BFFO11FD006.mail.protection.outlook.com (10.58.144.69) with Microsoft SMTP Server id 15.1.87.10 via Frontend Transport; Mon, 9 Feb 2015 15:23:10 +0000 X-WSS-ID: 0NJIG2K-07-7L2-02 X-M-MSG: Received: from satlvexedge01.amd.com (satlvexedge01.amd.com [10.177.96.28]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by atltwp01.amd.com (Axway MailGate 5.3.1) with ESMTPS id 2AF91CAE61F; Mon, 9 Feb 2015 09:23:08 -0600 (CST) Received: from SATLEXDAG01.amd.com (10.181.40.3) by satlvexedge01.amd.com (10.177.96.28) with Microsoft SMTP Server (TLS) id 14.3.195.1; Mon, 9 Feb 2015 09:23:29 -0600 Received: from ssuthiku-fedora-lt.amd.com (10.180.168.240) by SATLEXDAG01.amd.com (10.181.40.3) with Microsoft SMTP Server id 14.3.195.1; Mon, 9 Feb 2015 10:23:07 -0500 From: Suravee Suthikulpanit To: Bjorn Helgaas , Arnd Bergmann , "Will Deacon" , Catalin Marinas CC: Marc Zyngier , Lorenzo Pieralisi , Liviu Dudau , , , , Suravee Suthikulpanit Subject: [PATCH 1/2] pci: generic: Use the pci_scan_root_bus instead of pci_common_init_dev Date: Mon, 9 Feb 2015 23:22:29 +0800 Message-ID: <1423495350-12295-2-git-send-email-Suravee.Suthikulpanit@amd.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1423495350-12295-1-git-send-email-Suravee.Suthikulpanit@amd.com> References: <1423495350-12295-1-git-send-email-Suravee.Suthikulpanit@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) Authentication-Results: spf=none (sender IP is 165.204.84.221) smtp.mailfrom=Suravee.Suthikulpanit@amd.com; arm.com; dkim=none (message not signed) header.d=none; X-Forefront-Antispam-Report: CIP:165.204.84.221; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(428002)(87936001)(86362001)(19580395003)(48376002)(19580405001)(106466001)(76176999)(50986999)(92566002)(47776003)(50466002)(53416004)(105586002)(46102003)(2950100001)(50226001)(77156002)(77096005)(62966003)(101416001)(229853001)(36756003); DIR:OUT; SFP:1102; SCL:1; SRVR:CO1PR02MB207; H:atltwp01.amd.com; FPR:; SPF:None; MLV:sfv; LANG:en; X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:CO1PR02MB207; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004); SRVR:CO1PR02MB207; X-Forefront-PRVS: 04825EA361 X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:;SRVR:CO1PR02MB207; X-OriginatorOrg: amd4.onmicrosoft.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Feb 2015 15:23:10.3788 (UTC) X-MS-Exchange-CrossTenant-Id: fde4dada-be84-483f-92cc-e026cbee8e96 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fde4dada-be84-483f-92cc-e026cbee8e96; Ip=[165.204.84.221] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO1PR02MB207 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Replacing pci_common_init_dev with pci_scan_root_bus, and remove reference to struct pci_sys_data and pci_hw, which is specific to ARM32. This allows the PCI host generic driver to also usable in ARM64 architecture. Cc: Bjorn Helgaas Cc: Arnd Bergmann Cc: Will Deacon Cc: Marc Zyngier Cc: Lorenzo Pieralisi Cc: Catalin Marinas Cc: Liviu Dudau Signed-off-by: Suravee Suthikulpanit --- drivers/pci/host/Kconfig | 2 +- drivers/pci/host/pci-host-generic.c | 33 ++++++++++----------------------- 2 files changed, 11 insertions(+), 24 deletions(-) diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig index c4b6568..739bab0 100644 --- a/drivers/pci/host/Kconfig +++ b/drivers/pci/host/Kconfig @@ -53,7 +53,7 @@ config PCI_RCAR_GEN2_PCIE config PCI_HOST_GENERIC bool "Generic PCI host controller" - depends on ARM && OF + depends on (ARM||ARM64) && OF help Say Y here if you want to support a simple generic PCI host controller, such as the one emulated by kvmtool. diff --git a/drivers/pci/host/pci-host-generic.c b/drivers/pci/host/pci-host-generic.c index 6eb1aa7..93f64e4 100644 --- a/drivers/pci/host/pci-host-generic.c +++ b/drivers/pci/host/pci-host-generic.c @@ -48,8 +48,7 @@ static void __iomem *gen_pci_map_cfg_bus_cam(struct pci_bus *bus, unsigned int devfn, int where) { - struct pci_sys_data *sys = bus->sysdata; - struct gen_pci *pci = sys->private_data; + struct gen_pci *pci = bus->sysdata; resource_size_t idx = bus->number - pci->cfg.bus_range->start; return pci->cfg.win[idx] + ((devfn << 8) | where); @@ -64,8 +63,7 @@ static void __iomem *gen_pci_map_cfg_bus_ecam(struct pci_bus *bus, unsigned int devfn, int where) { - struct pci_sys_data *sys = bus->sysdata; - struct gen_pci *pci = sys->private_data; + struct gen_pci *pci = bus->sysdata; resource_size_t idx = bus->number - pci->cfg.bus_range->start; return pci->cfg.win[idx] + ((devfn << 12) | where); @@ -80,8 +78,7 @@ static int gen_pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) { void __iomem *addr; - struct pci_sys_data *sys = bus->sysdata; - struct gen_pci *pci = sys->private_data; + struct gen_pci *pci = bus->sysdata; addr = pci->cfg.ops->map_bus(bus, devfn, where); @@ -103,8 +100,7 @@ static int gen_pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) { void __iomem *addr; - struct pci_sys_data *sys = bus->sysdata; - struct gen_pci *pci = sys->private_data; + struct gen_pci *pci = bus->sysdata; addr = pci->cfg.ops->map_bus(bus, devfn, where); @@ -244,13 +240,6 @@ static int gen_pci_parse_map_cfg_windows(struct gen_pci *pci) return 0; } -static int gen_pci_setup(int nr, struct pci_sys_data *sys) -{ - struct gen_pci *pci = sys->private_data; - list_splice_init(&pci->resources, &sys->resources); - return 1; -} - static int gen_pci_probe(struct platform_device *pdev) { int err; @@ -260,13 +249,6 @@ static int gen_pci_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; struct gen_pci *pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL); - struct hw_pci hw = { - .nr_controllers = 1, - .private_data = (void **)&pci, - .setup = gen_pci_setup, - .map_irq = of_irq_parse_and_map_pci, - .ops = &gen_pci_ops, - }; if (!pci) return -ENOMEM; @@ -303,7 +285,12 @@ static int gen_pci_probe(struct platform_device *pdev) return err; } - pci_common_init_dev(dev, &hw); + if (!pci_scan_root_bus(&pdev->dev, pci->cfg.bus_range->start, + &gen_pci_ops, pci, &pci->resources)) { + dev_err(&pdev->dev, "failed to enable PCIe ports\n"); + return -ENODEV; + } + return 0; }