From patchwork Mon Oct 20 02:19:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 400954 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 7602014007B for ; Mon, 20 Oct 2014 13:51:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752008AbaJTCvi (ORCPT ); Sun, 19 Oct 2014 22:51:38 -0400 Received: from [207.46.100.141] ([207.46.100.141]:26448 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-FAIL-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752093AbaJTCve (ORCPT ); Sun, 19 Oct 2014 22:51:34 -0400 Received: from BY2PR03CA005.namprd03.prod.outlook.com (10.255.93.22) by DM2PR0301MB0863.namprd03.prod.outlook.com (25.160.215.149) with Microsoft SMTP Server (TLS) id 15.0.1054.13; Mon, 20 Oct 2014 02:49:40 +0000 Received: from BN1AFFO11FD015.protection.gbl (10.255.93.4) by BY2PR03CA005.outlook.office365.com (10.255.93.22) with Microsoft SMTP Server (TLS) id 15.0.1054.13 via Frontend Transport; Mon, 20 Oct 2014 02:49:40 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BN1AFFO11FD015.mail.protection.outlook.com (10.58.52.75) with Microsoft SMTP Server (TLS) id 15.0.1049.20 via Frontend Transport; Mon, 20 Oct 2014 02:49:39 +0000 Received: from shlinux1.ap.freescale.net (shlinux1.ap.freescale.net [10.192.225.216]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s9K2naaN019785; Sun, 19 Oct 2014 19:49:38 -0700 Received: by shlinux1.ap.freescale.net (Postfix, from userid 1003) id 2D2F41AE216; Mon, 20 Oct 2014 10:19:18 +0800 (CST) From: Richard Zhu To: CC: , , , , Richard Zhu , Richard Zhu Subject: [PATCH v7 13/13] ARM: imx6sx: Enable pcie on imx6sx sdb board Date: Mon, 20 Oct 2014 10:19:16 +0800 Message-ID: <1413771556-32212-14-git-send-email-richard.zhu@freescale.com> X-Mailer: git-send-email 1.7.8 In-Reply-To: <1413771556-32212-1-git-send-email-richard.zhu@freescale.com> References: <1413771556-32212-1-git-send-email-richard.zhu@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(428002)(199003)(189002)(2351001)(107046002)(6806004)(229853001)(44976005)(19580395003)(92566001)(92726001)(19580405001)(68736004)(69596002)(93916002)(105586002)(99396003)(85852003)(95666004)(4396001)(103686003)(50226001)(47776003)(20776003)(84676001)(76482002)(89996001)(64706001)(52956003)(88136002)(120916001)(106466001)(81156004)(87936001)(87286001)(33646002)(26826002)(77096002)(102836001)(85306004)(110136001)(104166001)(16796002)(31966008)(97736003)(101416001)(21056001)(42186005)(46102003)(80022003)(48376002)(50466002)(76176999)(50986999)(46386002)(36756003)(77156001)(45336002)(62966002)(32563001)(90966001); DIR:OUT; SFP:1102; SCL:1; SRVR:DM2PR0301MB0863; H:az84smr01.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; A:0; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:DM2PR0301MB0863; X-Forefront-PRVS: 03706074BC Received-SPF: None (protection.outlook.com: shlinux1.ap.freescale.net does not designate permitted sender hosts) Authentication-Results: spf=none (sender IP is 192.88.158.2) smtp.mailfrom=r65037@shlinux1.ap.freescale.net; X-OriginatorOrg: freescale.com Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Richard Zhu Signed-off-by: Richard Zhu --- arch/arm/boot/dts/imx6sx-sdb.dts | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts index a3980d9..e28214a 100644 --- a/arch/arm/boot/dts/imx6sx-sdb.dts +++ b/arch/arm/boot/dts/imx6sx-sdb.dts @@ -90,6 +90,19 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; + + reg_pcie: regulator@4 { + compatible = "regulator-fixed"; + reg = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie_reg>; + regulator-name = "MPCIE_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 1 0>; + regulator-always-on; + enable-active-high; + }; }; sound { @@ -251,6 +264,13 @@ }; }; +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie>; + reset-gpio = <&gpio2 0 0>; + status = "okay"; +}; + &ssi2 { status = "okay"; }; @@ -365,6 +385,18 @@ >; }; + pinctrl_pcie: pciegrp { + fsl,pins = < + MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x10b0 + >; + }; + + pinctrl_pcie_reg: pciereggrp { + fsl,pins = < + MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0x10b0 + >; + }; + pinctrl_vcc_sd3: vccsd3grp { fsl,pins = < MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059