From patchwork Thu Oct 2 04:07:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: matt@masarand.com X-Patchwork-Id: 395783 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 95226140213 for ; Thu, 2 Oct 2014 14:08:12 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752395AbaJBEIK (ORCPT ); Thu, 2 Oct 2014 00:08:10 -0400 Received: from foo.masarand.uk ([69.164.217.139]:56369 "EHLO foo.masarand.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752406AbaJBEIJ (ORCPT ); Thu, 2 Oct 2014 00:08:09 -0400 Received: from shredder.masarand.uk (shredder.masarand.uk [81.187.126.108]) by foo.masarand.uk (Postfix) with ESMTPSA id DA72DA111; Thu, 2 Oct 2014 05:08:08 +0100 (BST) From: matt@masarand.com To: bhelgaas@google.com Cc: linux-pci@vger.kernel.org, Matthew Minter Subject: [PATCH 17/18] Disabled bus scan time PCI IRQ assignment on parisc Date: Thu, 2 Oct 2014 05:07:45 +0100 Message-Id: <1412222866-21068-18-git-send-email-matt@masarand.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1412222866-21068-1-git-send-email-matt@masarand.com> References: <1412222866-21068-1-git-send-email-matt@masarand.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Matthew Minter Most of the architectures are switched to allocating IRQs at device_enable time instead of boot time, however parisc does not provide an easy way of making that transition so the new code is disabled here on parisc. Signed-off-by: Matthew Minter --- arch/parisc/kernel/pci.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c index 64f2764..9654c69 100644 --- a/arch/parisc/kernel/pci.c +++ b/arch/parisc/kernel/pci.c @@ -105,7 +105,13 @@ PCI_PORT_OUT(b, 8) PCI_PORT_OUT(w, 16) PCI_PORT_OUT(l, 32) - +/* We do not support hot-add irq assignment */ +int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) +{ + bridge->swizzle_irq = NULL; + bridge->map_irq = NULL; + return 0; +} /* * BIOS32 replacement.