From patchwork Tue Aug 26 15:11:36 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 383113 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 1DCD11400D7 for ; Wed, 27 Aug 2014 01:13:04 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934527AbaHZPMp (ORCPT ); Tue, 26 Aug 2014 11:12:45 -0400 Received: from mail-wg0-f47.google.com ([74.125.82.47]:40376 "EHLO mail-wg0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752309AbaHZPLt (ORCPT ); Tue, 26 Aug 2014 11:11:49 -0400 Received: by mail-wg0-f47.google.com with SMTP id b13so14412891wgh.6 for ; Tue, 26 Aug 2014 08:11:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ejb+QLmrUXfglasYjejk6Hr0CZNX0WBKywF6VrngY5Q=; b=iHamAXTMpk0Ri2MQn2TbDjJ7NorKMCksIX8aTj6+B8xy0iQsCJmgmrTC3YkvfWjCUU o6TIQ6evoFJqmv/tyj5BFeMO39p8DN0hYI9oBJKfAIxsdHFKk1nvzC/TAqYKvFSONDbY gE8cGngvxVcWBY9ib1YonKrgTsy7lGzCsaCNrIjwrMC75floCr1VcWVNenupeNCdkIdI tT0/FtU9GZOrIhui7eEu3DCVfSNopptaL/NpC4WsoJXikGtiaNNphhQnWp0jGMBzc9Dm FrIlQZtb6BLjwezoZnuUs36nycasEnn4+Vvj5JdmxyZyVbE0aNd8+HmHac+e3wZLlzei aqUA== X-Received: by 10.194.103.200 with SMTP id fy8mr2840776wjb.123.1409065908140; Tue, 26 Aug 2014 08:11:48 -0700 (PDT) Received: from localhost (port-7111.pppoe.wtnet.de. [84.46.27.226]) by mx.google.com with ESMTPSA id u7sm3384499wif.7.2014.08.26.08.11.47 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Aug 2014 08:11:47 -0700 (PDT) From: Thierry Reding To: Bjorn Helgaas Cc: Stephen Warren , linux-pci@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 4/6] PCI: tegra: Fix extended configuration space mapping Date: Tue, 26 Aug 2014 17:11:36 +0200 Message-Id: <1409065898-26887-5-git-send-email-thierry.reding@gmail.com> X-Mailer: git-send-email 2.0.4 In-Reply-To: <1409065898-26887-1-git-send-email-thierry.reding@gmail.com> References: <1409065898-26887-1-git-send-email-thierry.reding@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Peter Daifuku The 16 chunks of 64 KiB that need to be stitched together to make up the configuration space for one bus (1 MiB) are located 24 bits (== 16 MiB) apart in physical address space. This is determined by the start of the extended register field (bits 24-27) in the physical mapping. Signed-off-by: Peter Daifuku Signed-off-by: Thierry Reding --- drivers/pci/host/pci-tegra.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c index bd53b123218b..8264bce77750 100644 --- a/drivers/pci/host/pci-tegra.c +++ b/drivers/pci/host/pci-tegra.c @@ -383,7 +383,7 @@ static struct tegra_pcie_bus *tegra_pcie_bus_alloc(struct tegra_pcie *pcie, for (i = 0; i < 16; i++) { unsigned long virt = (unsigned long)bus->area->addr + i * SZ_64K; - phys_addr_t phys = cs + i * SZ_1M + busnr * SZ_64K; + phys_addr_t phys = cs + i * SZ_16M + busnr * SZ_64K; err = ioremap_page_range(virt, virt + SZ_64K, phys, prot); if (err < 0) {