@@ -274,6 +274,10 @@
};
};
+ pci {
+ status = "okay";
+ };
+
usb@c5000000 {
status = "okay";
};
@@ -116,21 +116,6 @@ static void __init tegra_dt_init(void)
tegra20_auxdata_lookup, NULL);
}
-#ifdef CONFIG_MACH_TRIMSLICE
-static struct tegra_pcie_pdata trimslice_pcie_pdata = {
- .enable_ports = {
- [0] = true,
- [1] = true,
- },
-};
-
-static void __init trimslice_init(void)
-{
- tegra_pcie_device.dev.platform_data = &trimslice_pcie_pdata;
- platform_device_register(&tegra_pcie_device);
-}
-#endif
-
#ifdef CONFIG_MACH_PAZ00
static void __init paz00_init(void)
{
@@ -142,9 +127,6 @@ static struct {
char *machine;
void (*init)(void);
} board_init_funcs[] = {
-#ifdef CONFIG_MACH_TRIMSLICE
- { "compulab,trimslice", trimslice_init },
-#endif
#ifdef CONFIG_MACH_PAZ00
{ "compal,paz00", paz00_init },
#endif
With the device tree support in place, probe the PCIe controller from the device tree and remove the corresponding workaround in the board file. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> --- Changes in v2: - new patch --- arch/arm/boot/dts/tegra-trimslice.dts | 4 ++++ arch/arm/mach-tegra/board-dt-tegra20.c | 18 ------------------ 2 files changed, 4 insertions(+), 18 deletions(-)