From patchwork Thu Nov 21 09:31:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dilip Kota X-Patchwork-Id: 1198831 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47JZ8F3w1Tz9sPf for ; Thu, 21 Nov 2019 20:31:57 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726568AbfKUJby (ORCPT ); Thu, 21 Nov 2019 04:31:54 -0500 Received: from mga17.intel.com ([192.55.52.151]:9978 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726532AbfKUJbx (ORCPT ); Thu, 21 Nov 2019 04:31:53 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Nov 2019 01:31:52 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,224,1571727600"; d="scan'208";a="216096857" Received: from sgsxdev004.isng.intel.com (HELO localhost) ([10.226.88.13]) by fmsmga001.fm.intel.com with ESMTP; 21 Nov 2019 01:31:48 -0800 From: Dilip Kota To: gustavo.pimentel@synopsys.com, lorenzo.pieralisi@arm.com, andrew.murray@arm.com, helgaas@kernel.org, jingoohan1@gmail.com, robh@kernel.org, martin.blumenstingl@googlemail.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, andriy.shevchenko@intel.com Cc: linux-kernel@vger.kernel.org, cheol.yong.kim@intel.com, chuanhua.lei@linux.intel.com, qi-ming.wu@intel.com, Dilip Kota Subject: [PATCH v9 0/3] PCI: Add Intel PCIe Driver and respective dt-binding yaml file Date: Thu, 21 Nov 2019 17:31:17 +0800 Message-Id: X-Mailer: git-send-email 2.11.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Intel PCIe is Synopsys based controller. Intel PCIe driver uses DesignWare PCIe framework for host initialization and register configurations. Dilip Kota (3): dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller dwc: PCI: intel: PCIe RC controller driver PCI: artpec6: Configure FTS with dwc helper function .../devicetree/bindings/pci/intel-gw-pcie.yaml | 138 ++++++ drivers/pci/controller/dwc/Kconfig | 10 + drivers/pci/controller/dwc/Makefile | 1 + drivers/pci/controller/dwc/pcie-artpec6.c | 8 +- drivers/pci/controller/dwc/pcie-designware.c | 57 +++ drivers/pci/controller/dwc/pcie-designware.h | 12 + drivers/pci/controller/dwc/pcie-intel-gw.c | 545 +++++++++++++++++++++ include/uapi/linux/pci_regs.h | 1 + 8 files changed, 765 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml create mode 100644 drivers/pci/controller/dwc/pcie-intel-gw.c