From patchwork Wed Feb 28 12:04:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Pimentel X-Patchwork-Id: 879079 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=synopsys.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zrvPg5wRPz9s1x for ; Wed, 28 Feb 2018 23:04:39 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752279AbeB1MEh (ORCPT ); Wed, 28 Feb 2018 07:04:37 -0500 Received: from us01smtprelay-2.synopsys.com ([198.182.60.111]:37713 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752195AbeB1MEh (ORCPT ); Wed, 28 Feb 2018 07:04:37 -0500 Received: from mailhost.synopsys.com (mailhost2.synopsys.com [10.13.184.66]) by smtprelay.synopsys.com (Postfix) with ESMTP id B51FB10C1257; Wed, 28 Feb 2018 04:04:35 -0800 (PST) Received: from mailhost.synopsys.com (localhost [127.0.0.1]) by mailhost.synopsys.com (Postfix) with ESMTP id 935433983; Wed, 28 Feb 2018 04:04:35 -0800 (PST) Received: from pt02.synopsys.com (pt02.internal.synopsys.com [10.107.23.240]) by mailhost.synopsys.com (Postfix) with ESMTP id 56F113970; Wed, 28 Feb 2018 04:04:34 -0800 (PST) Received: from UbuntuMate-64Bits.internal.synopsys.com (gustavo-e7480.internal.synopsys.com [10.107.19.28]) by pt02.synopsys.com (Postfix) with ESMTP id 7EC8593D9; Wed, 28 Feb 2018 12:04:33 +0000 (WET) From: Gustavo Pimentel To: marc.zyngier@arm.com, Joao.Pinto@synopsys.com, bhelgaas@google.com, jingoohan1@gmail.com, kishon@ti.com, lorenzo.pieralisi@arm.com Cc: linux-pci@vger.kernel.org, m-karicheri2@ti.com, thomas.petazzoni@free-electrons.com, minghuan.Lian@freescale.com, mingkai.hu@freescale.com, tie-fei.zang@freescale.com, hongxing.zhu@nxp.com, l.stach@pengutronix.de, niklas.cassel@axis.com, jesper.nilsson@axis.com, wangzhou1@hisilicon.com, gabriele.paoloni@huawei.com, svarbanov@mm-sol.com, nsekhar@ti.com, gustavo.pimentel@synopsys.com Subject: [PATCH v8 0/9] PCI: dwc: Enables MSI-X driver support Date: Wed, 28 Feb 2018 12:04:13 +0000 Message-Id: X-Mailer: git-send-email 2.7.4 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Changes into a new IRQ handler mechanism (multiplexed IRQ domain hierarchy) more suitable and appropriate to use on pcie-designware and on each SoC specific driver in order to allow new and more complex features like MSI-X. Adds Synopsys Root Complex driver support for MSI-X feature. Expands the maximum number of IRQs from 32 to 256 distributed by a maximum of 8 controller registers. The patch set was made against the Bjorn's master branch (v4.16-rc1). Gustavo Pimentel (9): PCI: dwc: Add new IRQ API to pcie-desigware PCI: dwc: exynos: Switch to use the new IRQ API PCI: dwc: imx6: Switch to use the new IRQ API PCI: dwc: artpec6: Switch to use the new IRQ API PCI: dwc: designware: Switch to use the new IRQ API PCI: dwc: qcom: Switch to use the new IRQ API PCI: dwc: keystone: Switch to use the new IRQ API PCI: dwc: Remove old IRQ API PCI: dwc: Expand maximum number of IRQs from 32 to 256 drivers/pci/dwc/pci-exynos.c | 18 -- drivers/pci/dwc/pci-imx6.c | 18 -- drivers/pci/dwc/pci-keystone-dw.c | 91 +------- drivers/pci/dwc/pci-keystone.c | 1 + drivers/pci/dwc/pci-keystone.h | 4 +- drivers/pci/dwc/pci-layerscape.c | 3 +- drivers/pci/dwc/pcie-artpec6.c | 18 -- drivers/pci/dwc/pcie-designware-host.c | 398 +++++++++++++++++++-------------- drivers/pci/dwc/pcie-designware-plat.c | 16 -- drivers/pci/dwc/pcie-designware.h | 30 ++- drivers/pci/dwc/pcie-qcom.c | 16 -- 11 files changed, 258 insertions(+), 355 deletions(-)