From patchwork Thu Dec 28 11:56:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Pimentel X-Patchwork-Id: 853415 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3z6pBV55Pmz9s72 for ; Thu, 28 Dec 2017 22:57:54 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753328AbdL1L5u (ORCPT ); Thu, 28 Dec 2017 06:57:50 -0500 Received: from us01smtprelay-2.synopsys.com ([198.182.47.9]:50591 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753335AbdL1L5r (ORCPT ); Thu, 28 Dec 2017 06:57:47 -0500 Received: from mailhost.synopsys.com (mailhost3.synopsys.com [10.12.238.238]) by smtprelay.synopsys.com (Postfix) with ESMTP id ADECE24E2645; Thu, 28 Dec 2017 03:57:44 -0800 (PST) Received: from mailhost.synopsys.com (localhost [127.0.0.1]) by mailhost.synopsys.com (Postfix) with ESMTP id 7EF36302; Thu, 28 Dec 2017 03:57:44 -0800 (PST) Received: from pt02.synopsys.com (pt02.internal.synopsys.com [10.107.23.240]) by mailhost.synopsys.com (Postfix) with ESMTP id E74152EB; Thu, 28 Dec 2017 03:57:42 -0800 (PST) Received: from UbuntuMate-64Bits.internal.synopsys.com (gustavo-e7480.internal.synopsys.com [10.107.25.67]) by pt02.synopsys.com (Postfix) with ESMTP id 3E1E79C44; Thu, 28 Dec 2017 11:57:42 +0000 (WET) From: Gustavo Pimentel To: marc.zyngier@arm.com, Joao.Pinto@synopsys.com, bhelgaas@google.com, jingoohan1@gmail.com, kishon@ti.com Cc: linux-pci@vger.kernel.org, m-karicheri2@ti.com, thomas.petazzoni@free-electrons.com, minghuan.Lian@freescale.com, mingkai.hu@freescale.com, tie-fei.zang@freescale.com, hongxing.zhu@nxp.com, l.stach@pengutronix.de, niklas.cassel@axis.com, jesper.nilsson@axis.com, wangzhou1@hisilicon.com, gabriele.paoloni@huawei.com, svarbanov@mm-sol.com, nsekhar@ti.com, Gustavo Pimentel Subject: [PATCH v3 0/9] add new irq api to pcie-designware Date: Thu, 28 Dec 2017 11:56:38 +0000 Message-Id: X-Mailer: git-send-email 2.7.4 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This patch series adds the new interrupt api to pcie-designware make it possible to use features like MSIX. The work consisted of adapting the pcie-designware-host and each SoC specific driver. The patch set was made against the Bjorn' next branch. A new patch set (v3) was created that includes Kishon's fixes (pci end point error and a dra7xx warning) in file 0007-pci-keystone-SoC-driver-adapted-to-new-irq-API.patch. Gustavo Pimentel (9): pci: adding new irq api to pci-designware pci: exynos SoC driver adapted to new irq API pci: imx6 SoC driver adapted to new irq API pci: artpec6 SoC driver adapted to new irq API pci: generic PCIe DW driver adapted to new irq API pci: qcom SoC driver adapted to new irq API pci: keystone SoC driver adapted to new irq API pci: removing old irq api from pcie-designware pci: remove limitation of the number of the available IRQs drivers/pci/dwc/pci-exynos.c | 18 -- drivers/pci/dwc/pci-imx6.c | 18 -- drivers/pci/dwc/pci-keystone-dw.c | 88 +------- drivers/pci/dwc/pci-keystone.c | 1 + drivers/pci/dwc/pci-keystone.h | 4 +- drivers/pci/dwc/pci-layerscape.c | 4 +- drivers/pci/dwc/pcie-artpec6.c | 18 -- drivers/pci/dwc/pcie-designware-host.c | 391 +++++++++++++++++++-------------- drivers/pci/dwc/pcie-designware-plat.c | 16 -- drivers/pci/dwc/pcie-designware.h | 30 ++- drivers/pci/dwc/pcie-qcom.c | 16 -- 11 files changed, 254 insertions(+), 350 deletions(-)