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[v3,00/11] Multiple fixes in PCIe qcom driver

Message ID 20200430220619.3169-1-ansuelsmth@gmail.com
Headers show
Series Multiple fixes in PCIe qcom driver | expand

Message

Christian Marangi April 30, 2020, 10:06 p.m. UTC
This contains multiple fix for PCIe qcom driver.
Some optional reset and clocks were missing.
Fix a problem with no PARF programming that cause kernel lock on load.
Add support to force gen 1 speed if needed. (due to hardware limitation)
Add ipq8064 rev 2 support that use a different tx termination offset.

v3:
* Fix check reported by checkpatch --strict
* Rename force_gen1 to gen
* Fix spelling error
* Better describe qcom_clear_and_set_dword
* Make PARF deemph and equalization configurable

v2:
* Drop iATU programming (already done in pcie init)
* Use max-link-speed instead of force-gen1 custom definition
* Drop MRRS to 256B (Can't find a realy reason why this was suggested)
* Introduce a new variant for different revision of ipq8064

Abhishek Sahu (1):
  PCI: qcom: change duplicate PCI reset to phy reset

Ansuel Smith (8):
  PCI: qcom: add missing ipq806x clocks in PCIe driver
  devicetree: bindings: pci: add missing clks to qcom,pcie
  PCI: qcom: add missing reset for ipq806x
  devicetree: bindings: pci: add ext reset to qcom,pcie
  PCI: qcom: introduce qcom_clear_and_set_dword
  PCI: qcom: add support for defining some PARF params
  devicetree: bindings: pci: document PARF params bindings
  devicetree: bindings: pci: add ipq8064 rev 2 variant to qcom,pcie

Sham Muthayyan (2):
  PCI: qcom: add ipq8064 rev2 variant and set tx term offset
  PCI: qcom: add Force GEN1 support

 .../devicetree/bindings/pci/qcom,pcie.txt     |  51 +++-
 drivers/pci/controller/dwc/pcie-qcom.c        | 241 ++++++++++++------
 2 files changed, 211 insertions(+), 81 deletions(-)

Comments

Bjorn Helgaas May 1, 2020, 5:07 p.m. UTC | #1
On Fri, May 01, 2020 at 12:06:07AM +0200, Ansuel Smith wrote:
> This contains multiple fix for PCIe qcom driver.
> Some optional reset and clocks were missing.
> Fix a problem with no PARF programming that cause kernel lock on load.
> Add support to force gen 1 speed if needed. (due to hardware limitation)
> Add ipq8064 rev 2 support that use a different tx termination offset.
> 
> v3:
> * Fix check reported by checkpatch --strict
> * Rename force_gen1 to gen
> * Fix spelling error
> * Better describe qcom_clear_and_set_dword
> * Make PARF deemph and equalization configurable
> 
> v2:
> * Drop iATU programming (already done in pcie init)
> * Use max-link-speed instead of force-gen1 custom definition
> * Drop MRRS to 256B (Can't find a realy reason why this was suggested)
> * Introduce a new variant for different revision of ipq8064
> 
> Abhishek Sahu (1):
>   PCI: qcom: change duplicate PCI reset to phy reset
> 
> Ansuel Smith (8):
>   PCI: qcom: add missing ipq806x clocks in PCIe driver

s/in PCIe driver// (obvious from context)

>   devicetree: bindings: pci: add missing clks to qcom,pcie
>   PCI: qcom: add missing reset for ipq806x
>   devicetree: bindings: pci: add ext reset to qcom,pcie

s/to qcom,pcie// (obvious from context after updating as below)

>   PCI: qcom: introduce qcom_clear_and_set_dword
>   PCI: qcom: add support for defining some PARF params
>   devicetree: bindings: pci: document PARF params bindings
>   devicetree: bindings: pci: add ipq8064 rev 2 variant to qcom,pcie

s/to qcom,pcie// (obvious from context after updating as below)

> Sham Muthayyan (2):
>   PCI: qcom: add ipq8064 rev2 variant and set tx term offset
>   PCI: qcom: add Force GEN1 support

Hi Ansuel, if you post this again, would you mind adjusting your
subject lines to match the history, e.g.,

  $ git log --oneline drivers/pci/controller/dwc/pcie-qcom.c
  604f3956524a PCI: qcom: Fix the fixup of PCI_VENDOR_ID_QCOM
  ed8cc3b1fc84 PCI: qcom: Add support for SDM845 PCIe controller
  64adde31c8e9 PCI: qcom: Ensure that PERST is asserted for at least 100 ms
  ...

  $ git log --oneline Documentation/devicetree/bindings/pci/qcom,pcie.txt
  5d28bee7c91e dt-bindings: PCI: qcom: Add support for SDM845 PCIe
  29a50257a9d6 dt-bindings: PCI: qcom: Add QCS404 to the binding

(Capitalize first word, follow "dt-bindings: PCI: qcom" example).

Some of the commit logs also have random-length short lines.  Please
wrap them to use the entire ~75 column width and add blank lines
between paragraphs.

Add ("..") on the Fixes: lines.  See git log for common practice.  I
use this alias to make them:

  $ type gsr
  gsr is aliased to `git --no-pager show -s --abbrev-commit --abbrev=12 --pretty=format:"%h (\"%s\")%n"'
  $ gsr 82a823833f4e
  82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")

Some of the logs use "SoC", some use "soc".  I prefer "SoC" because
"soc" really isn't an English word.

You don't need to post a new version just for these tweaks, but maybe
make them in your local copy so if you do post a v4 for some other
reason, they'll be included.

>  .../devicetree/bindings/pci/qcom,pcie.txt     |  51 +++-
>  drivers/pci/controller/dwc/pcie-qcom.c        | 241 ++++++++++++------
>  2 files changed, 211 insertions(+), 81 deletions(-)
> 
> -- 
> 2.25.1
>