Message ID | 1580215483-8835-1-git-send-email-bharat.kumar.gogada@xilinx.com |
---|---|
Headers | show |
Series | Adding support for Versal CPM as Root Port driver. | expand |
On Tue, Jan 28, 2020 at 06:14:41PM +0530, Bharat Kumar Gogada wrote: > - Add support for Versal CPM as Root port. > - The Versal ACAP devices include CCIX-PCIe Module (CPM). The integrated > block for CPM along with the integrated bridge can function > as PCIe Root Port. > - Versal CPM uses GICv3 ITS feature for assigning MSI/MSI-X > vectors and handling MSI/MSI-X interrupts. > - Bridge error and legacy interrupts in Versal CPM are handled using > Versal CPM specific MISC interrupt line. > > Bharat Kumar Gogada (2): > PCI: xilinx-cpm: Add device tree binding for Versal CPM host bridge. > PCI: xilinx-cpm: Add Versal CPM Root Port driver Nit for next time: Omit the period at the end of the subject. No need to repost just for that. > .../devicetree/bindings/pci/xilinx-versal-cpm.txt | 66 +++ > drivers/pci/controller/Kconfig | 8 + > drivers/pci/controller/Makefile | 1 + > drivers/pci/controller/pcie-xilinx-cpm.c | 506 +++++++++++++++++++++ > 4 files changed, 581 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/xilinx-versal-cpm.txt > create mode 100644 drivers/pci/controller/pcie-xilinx-cpm.c > > -- > 2.7.4 >