| Message ID | d9057834d9845715dcb69a2ab895943bf1a5fd0e.1331705527.git.vipin.kumar@st.com |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c index fb2cc8b..3f33103 100644 --- a/drivers/mtd/nand/fsmc_nand.c +++ b/drivers/mtd/nand/fsmc_nand.c @@ -549,7 +549,9 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, * to read at least 13 bytes even in case of 16 bit NAND * devices */ - len = roundup(len, 2); + if (chip->options & NAND_BUSWIDTH_16) + len = roundup(len, 2); + chip->cmdfunc(mtd, NAND_CMD_READOOB, off, page); chip->read_buf(mtd, oob + j, len); j += len;
The ECC logic of FSMC works on 512 bytes data + 13 bytes ECC to generate error indices of upto 8 incorrect bits. The FSMC driver reads 14 instead of 13 oob bytes to accommodate for 16 bit device as well. Unfortunately, the internal ecc state machine gets corrupted for 8 bit devices reading 512 + 14 bytes of data resulting in error indices not getting reported. Fix this by reading 14 bytes only for 16 bit devices Signed-off-by: Vipin Kumar <vipin.kumar@st.com> --- drivers/mtd/nand/fsmc_nand.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-)