From patchwork Wed Mar 7 11:30:52 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vipin Kumar X-Patchwork-Id: 145188 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 47C05B6F98 for ; Wed, 7 Mar 2012 22:33:43 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1S5F6W-0006ge-EJ; Wed, 07 Mar 2012 11:32:24 +0000 Received: from eu1sys200aog102.obsmtp.com ([207.126.144.113]) by merlin.infradead.org with smtps (Exim 4.76 #1 (Red Hat Linux)) id 1S5F65-0006VO-Kj for linux-mtd@lists.infradead.org; Wed, 07 Mar 2012 11:31:59 +0000 Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob102.postini.com ([207.126.147.11]) with SMTP ID DSNKT1dHJwsJ81RvhRY45Wp5n/vmrTHr9bk2@postini.com; Wed, 07 Mar 2012 11:31:57 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 78E1BCD; Wed, 7 Mar 2012 11:23:23 +0000 (GMT) Received: from Webmail-ap.st.com (eapex1hubcas2.st.com [10.80.176.10]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 8605C130D; Wed, 7 Mar 2012 11:31:48 +0000 (GMT) Received: from localhost (10.199.82.178) by Webmail-ap.st.com (10.80.176.7) with Microsoft SMTP Server (TLS) id 8.3.192.1; Wed, 7 Mar 2012 19:31:19 +0800 From: Vipin Kumar To: Subject: [PATCH 04/18] mtd/nand/fsmc: Move ALE, CLE defines to their respective platform Date: Wed, 7 Mar 2012 17:00:52 +0530 Message-ID: X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [207.126.144.113 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Artem.Bityutskiy@nokia.com, linus.walleij@linaro.org, Shiraz Hashim X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Shiraz Hashim Address Latch Enable (ALE) and Command Latch Enable (CLE) defines are platform specific and were wrongly put in driver specific fsmc.h file. Move such defines to their respective platform. Also instead of relying on fsmc driver, pass ALE, CLE offsets explicitly from individual platform. Signed-off-by: Shiraz Hashim --- arch/arm/mach-u300/core.c | 2 ++ arch/arm/mach-u300/include/mach/u300-regs.h | 5 +++++ include/linux/mtd/fsmc.h | 13 ------------- 3 files changed, 7 insertions(+), 13 deletions(-) diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index 336526a..cb81d3c 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -1543,6 +1543,8 @@ static struct fsmc_nand_platform_data nand_platform_data = { .nr_partitions = ARRAY_SIZE(u300_partitions), .options = NAND_SKIP_BBTSCAN, .width = FSMC_NAND_BW8, + .ale_off = PLAT_NAND_ALE, + .cle_off = PLAT_NAND_CLE, }; static struct platform_device nand_device = { diff --git a/arch/arm/mach-u300/include/mach/u300-regs.h b/arch/arm/mach-u300/include/mach/u300-regs.h index 035fdc9..b9701fb 100644 --- a/arch/arm/mach-u300/include/mach/u300-regs.h +++ b/arch/arm/mach-u300/include/mach/u300-regs.h @@ -30,6 +30,11 @@ /* NFIF */ #define U300_NAND_IF_PHYS_BASE 0x9f800000 +/* ALE, CLE offset for FSMC NAND */ +#define PLAT_NAND_CLE (1 << 16) +#define PLAT_NAND_ALE (1 << 17) + + /* AHB Peripherals */ #define U300_AHB_PER_PHYS_BASE 0xa0000000 #define U300_AHB_PER_VIRT_BASE 0xff010000 diff --git a/include/linux/mtd/fsmc.h b/include/linux/mtd/fsmc.h index 2cd655f..e877325 100644 --- a/include/linux/mtd/fsmc.h +++ b/include/linux/mtd/fsmc.h @@ -26,19 +26,6 @@ #define FSMC_NAND_BW8 1 #define FSMC_NAND_BW16 2 -/* - * The placement of the Command Latch Enable (CLE) and - * Address Latch Enable (ALE) is twisted around in the - * SPEAR310 implementation. - */ -#if defined(CONFIG_MACH_SPEAR310) -#define PLAT_NAND_CLE (1 << 17) -#define PLAT_NAND_ALE (1 << 16) -#else -#define PLAT_NAND_CLE (1 << 16) -#define PLAT_NAND_ALE (1 << 17) -#endif - #define FSMC_MAX_NOR_BANKS 4 #define FSMC_MAX_NAND_BANKS 4