diff mbox series

[2/2] mtd: chips: cfi_cmdset0002: Fixups for Infineon(Cypress) S26Hx

Message ID 9bffcf1a61b3adc1eeb19db1b13c0c372ac1eef0.1680663252.git.Takahiro.Kuwano@infineon.com
State New
Delegated to: Vignesh R
Headers show
Series mtd: hyperbus: Add support for Infineon S26Hx-T | expand

Commit Message

Takahiro Kuwano April 7, 2023, 6:11 a.m. UTC 
From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>

Infineon(Cypress) S26HL-T/S26HS-T family has AMD/Fujitsu command set in
Hyperbus mode. The parts have on-die ECC that program granularity is 16
bytes data unit where we cannot word-program nor bit-walking. Fixups for
these ECC related requirements are added to cfi_nopri_fixup_table[] as
the parts do not have primary extended table.

The parts do not support DQ polling so we need to use status_reg.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
---
 drivers/mtd/chips/cfi_cmdset_0002.c | 25 +++++++++++++++++++++++++
 include/linux/mtd/cfi.h             |  1 +
 2 files changed, 26 insertions(+)
diff mbox series

Patch

diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
index 67453f59c69c..b4e1b0d516b1 100644
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -124,6 +124,10 @@  static int cfi_use_status_reg(struct cfi_private *cfi)
 	struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
 	u8 poll_mask = CFI_POLL_STATUS_REG | CFI_POLL_DQ;
 
+	/* DQ polling is not supported in Cypress chips (S26Hx) */
+	if (cfi->mfr == CFI_MFR_CYPRESS)
+		return 1;
+
 	return extp && extp->MinorVersion >= '5' &&
 		(extp->SoftwareFeatures & poll_mask) == CFI_POLL_STATUS_REG;
 }
@@ -450,6 +454,23 @@  static void fixup_quirks(struct mtd_info *mtd)
 		cfi->quirks |= CFI_QUIRK_DQ_TRUE_DATA;
 }
 
+static void fixup_s26hx_writesize(struct mtd_info *mtd)
+{
+	/*
+	 * Programming is supported only in 16-byte ECC data unit granularity.
+	 * Byte(word)-programming, bit-walking, or multiple program operations
+	 * to the same ECC data unit without an erase are not allowed.
+	 */
+	mtd->writesize = 16;
+	mtd->_write = cfi_amdstd_write_buffers;
+
+	/*
+	 * Unset MTD_BIT_WRITEABLE to activate JFFS2 write buffer for ECC'd NOR
+	 * flash.
+	 */
+	mtd->flags = MTD_CAP_NORFLASH & ~MTD_BIT_WRITEABLE;
+}
+
 /* Used to fix CFI-Tables of chips without Extended Query Tables */
 static struct cfi_fixup cfi_nopri_fixup_table[] = {
 	{ CFI_MFR_SST, 0x234a, fixup_sst39vf }, /* SST39VF1602 */
@@ -460,6 +481,10 @@  static struct cfi_fixup cfi_nopri_fixup_table[] = {
 	{ CFI_MFR_SST, 0x235d, fixup_sst39vf_rev_b }, /* SST39VF3201B */
 	{ CFI_MFR_SST, 0x236c, fixup_sst39vf_rev_b }, /* SST39VF6402B */
 	{ CFI_MFR_SST, 0x236d, fixup_sst39vf_rev_b }, /* SST39VF6401B */
+	{ CFI_MFR_CYPRESS, 0x6a1a, fixup_s26hx_writesize }, /* S26HL512T */
+	{ CFI_MFR_CYPRESS, 0x6a1b, fixup_s26hx_writesize }, /* S26HL01GT */
+	{ CFI_MFR_CYPRESS, 0x7b1a, fixup_s26hx_writesize }, /* S26HS512T */
+	{ CFI_MFR_CYPRESS, 0x7b1b, fixup_s26hx_writesize }, /* S26HS01GT */
 	{ 0, 0, NULL }
 };
 
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
index d88bb56c18e2..29668241b44e 100644
--- a/include/linux/mtd/cfi.h
+++ b/include/linux/mtd/cfi.h
@@ -374,6 +374,7 @@  struct cfi_fixup {
 #define CFI_MFR_MICRON		0x002C /* Micron */
 #define CFI_MFR_TOSHIBA		0x0098
 #define CFI_MFR_WINBOND		0x00DA
+#define CFI_MFR_CYPRESS		0x0034
 
 void cfi_fixup(struct mtd_info *mtd, struct cfi_fixup* fixups);