From patchwork Tue Oct 9 10:44:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vipin Kumar X-Patchwork-Id: 190269 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A7CDD2C00D6 for ; Tue, 9 Oct 2012 21:47:45 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TLXL2-0005q0-MX; Tue, 09 Oct 2012 10:47:00 +0000 Received: from eu1sys200aog111.obsmtp.com ([207.126.144.131]) by merlin.infradead.org with smtps (Exim 4.76 #1 (Red Hat Linux)) id 1TLXJO-0005Ep-3E; Tue, 09 Oct 2012 10:45:22 +0000 Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob111.postini.com ([207.126.147.11]) with SMTP ID DSNKUHQAOXUOnziwPtyeT3uDwwdvpPzvww5v@postini.com; Tue, 09 Oct 2012 10:45:17 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id D370FB3; Tue, 9 Oct 2012 10:36:56 +0000 (GMT) Received: from Webmail-ap.st.com (eapex1hubcas3.st.com [10.80.176.67]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 783B4CE6; Tue, 9 Oct 2012 10:45:10 +0000 (GMT) Received: from localhost (10.199.82.151) by Webmail-ap.st.com (10.80.176.7) with Microsoft SMTP Server (TLS) id 8.3.245.1; Tue, 9 Oct 2012 18:45:10 +0800 From: Vipin Kumar To: , Subject: [PATCH 04/11] fsmc/nand: Accept nand timing parameters via DT Date: Tue, 9 Oct 2012 16:14:46 +0530 Message-ID: <54eda40e56e8ea02ed9c5332ca6d3fb90d617cc7.1349778821.git.vipin.kumar@st.com> X-Mailer: git-send-email 1.7.10.rc2.10.gb47606 In-Reply-To: References: MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [207.126.144.131 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Vipin Kumar , linus.walleij@linaro.org, spear-devel@list.st.com, plagnioj@jcrosoft.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Add support to accept nand timing parameters via device tree Signed-off-by: Vipin Kumar Reviewed-by: Viresh Kumar --- .../devicetree/bindings/mtd/fsmc-nand.txt | 20 ++++++++ drivers/mtd/nand/fsmc_nand.c | 59 ++++++++++++++-------- include/linux/mtd/fsmc.h | 2 +- 3 files changed, 59 insertions(+), 22 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/fsmc-nand.txt b/Documentation/devicetree/bindings/mtd/fsmc-nand.txt index 29d1a2f..6a7fc43 100644 --- a/Documentation/devicetree/bindings/mtd/fsmc-nand.txt +++ b/Documentation/devicetree/bindings/mtd/fsmc-nand.txt @@ -13,6 +13,18 @@ Optional properties: defaults to 1 byte - nand-skip-bbtscan: Indicates the the BBT scanning should be skipped +- nand-timings-enabled: Indicates if the timing parameters are passed + via DT +- nand-timings,tclr: +- nand-timings,tar: +- nand-timings,thiz: +- nand-timings,thold: +- nand-timings,twait: +- nand-timings,tset: All these timing parameters come from the actual + nand device specification. Each of this represents a number of time + period of hclk ie a number 4 in thold with hclk = 166MHz means that + thold = (1000 / 166) * 4 ns = 24.09ns + Example: fsmc: flash@d1800000 { @@ -26,6 +38,14 @@ Example: st,cle-off = <0x10000>; maxbanks = <1>; + nand-timings-enabled; + nand-timings,tclr = <1>; + nand-timings,tar = <1>; + nand-timings,thiz = <1>; + nand-timings,thold = <4>; + nand-timings,twait = <6>; + nand-timings,tset = <0>; + bank-width = <1>; nand-skip-bbtscan; diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c index fc6a044..f3d69b3 100644 --- a/drivers/mtd/nand/fsmc_nand.c +++ b/drivers/mtd/nand/fsmc_nand.c @@ -415,27 +415,13 @@ static void fsmc_nand_setup(void __iomem *regs, uint32_t bank, { uint32_t value = FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON; uint32_t tclr, tar, thiz, thold, twait, tset; - struct fsmc_nand_timings *tims; - struct fsmc_nand_timings default_timings = { - .tclr = FSMC_TCLR_1, - .tar = FSMC_TAR_1, - .thiz = FSMC_THIZ_1, - .thold = FSMC_THOLD_4, - .twait = FSMC_TWAIT_6, - .tset = FSMC_TSET_0, - }; - - if (timings) - tims = timings; - else - tims = &default_timings; - tclr = (tims->tclr & FSMC_TCLR_MASK) << FSMC_TCLR_SHIFT; - tar = (tims->tar & FSMC_TAR_MASK) << FSMC_TAR_SHIFT; - thiz = (tims->thiz & FSMC_THIZ_MASK) << FSMC_THIZ_SHIFT; - thold = (tims->thold & FSMC_THOLD_MASK) << FSMC_THOLD_SHIFT; - twait = (tims->twait & FSMC_TWAIT_MASK) << FSMC_TWAIT_SHIFT; - tset = (tims->tset & FSMC_TSET_MASK) << FSMC_TSET_SHIFT; + tclr = (timings->tclr & FSMC_TCLR_MASK) << FSMC_TCLR_SHIFT; + tar = (timings->tar & FSMC_TAR_MASK) << FSMC_TAR_SHIFT; + thiz = (timings->thiz & FSMC_THIZ_MASK) << FSMC_THIZ_SHIFT; + thold = (timings->thold & FSMC_THOLD_MASK) << FSMC_THOLD_SHIFT; + twait = (timings->twait & FSMC_TWAIT_MASK) << FSMC_TWAIT_SHIFT; + tset = (timings->tset & FSMC_TSET_MASK) << FSMC_TSET_SHIFT; if (busw) writel(value | FSMC_DEVWID_16, FSMC_NAND_REG(regs, bank, PC)); @@ -876,6 +862,14 @@ static int __devinit fsmc_nand_probe_config_dt(struct platform_device *pdev, struct device_node *np) { struct fsmc_nand_platform_data *pdata = dev_get_platdata(&pdev->dev); + struct fsmc_nand_timings default_timings = { + .tclr = FSMC_TCLR_1, + .tar = FSMC_TAR_1, + .thiz = FSMC_THIZ_1, + .thold = FSMC_THOLD_4, + .twait = FSMC_TWAIT_6, + .tset = FSMC_TSET_0, + }; u32 val; /* Set default NAND width to 8 bits */ @@ -894,6 +888,29 @@ static int __devinit fsmc_nand_probe_config_dt(struct platform_device *pdev, pdata->options = NAND_SKIP_BBTSCAN; of_property_read_u32(np, "maxbanks", &pdata->max_banks); + if (of_property_read_bool(np, "nand-timings-enabled")) { + of_property_read_u32(np, "nand-timings,tclr", &val); + pdata->nand_timings.tclr = (uint8_t)val; + + of_property_read_u32(np, "nand-timings,tar", &val); + pdata->nand_timings.tar = (uint8_t)val; + + of_property_read_u32(np, "nand-timings,thiz", &val); + pdata->nand_timings.thiz = (uint8_t)val; + + of_property_read_u32(np, "nand-timings,thold", &val); + pdata->nand_timings.thold = (uint8_t)val; + + of_property_read_u32(np, "nand-timings,twait", &val); + pdata->nand_timings.twait = (uint8_t)val; + + of_property_read_u32(np, "nand-timings,tset", &val); + pdata->nand_timings.tset = (uint8_t)val; + } else { + memcpy(&pdata->nand_timings, &default_timings, + sizeof(default_timings)); + } + return 0; } #else @@ -1031,7 +1048,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev) host->partitions = pdata->partitions; host->nr_partitions = pdata->nr_partitions; host->dev = &pdev->dev; - host->dev_timings = pdata->nand_timings; + host->dev_timings = &pdata->nand_timings; host->mode = pdata->mode; host->max_banks = pdata->max_banks; diff --git a/include/linux/mtd/fsmc.h b/include/linux/mtd/fsmc.h index f0ab734..4fbdce4 100644 --- a/include/linux/mtd/fsmc.h +++ b/include/linux/mtd/fsmc.h @@ -148,7 +148,7 @@ enum access_mode { * this may be set to NULL */ struct fsmc_nand_platform_data { - struct fsmc_nand_timings *nand_timings; + struct fsmc_nand_timings nand_timings; struct mtd_partition *partitions; unsigned int nr_partitions; unsigned int options;