Message ID | 20240927020749.46791-2-hpchen0nvt@gmail.com |
---|---|
State | New |
Headers | show |
Series | Add support for nuvoton ma35 nand controller | expand |
Hi Hui-Ping, hpchen0nvt@gmail.com wrote on Fri, 27 Sep 2024 02:07:48 +0000: > Add dt-bindings for the Nuvoton MA35 SoC NAND Controller. > > Signed-off-by: Hui-Ping Chen <hpchen0nvt@gmail.com> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/mtd/nuvoton,ma35d1-nand.yaml | 93 +++++++++++++++++++ > 1 file changed, 93 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml > > diff --git a/Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml b/Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml > new file mode 100644 > index 000000000000..a8a549644c98 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml > @@ -0,0 +1,93 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mtd/nuvoton,ma35d1-nand.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Nuvoton MA35D1 NAND Flash Interface (NFI) Controller > + > +maintainers: > + - Hui-Ping Chen <hpchen0nvt@gmail.com> > + > +allOf: > + - $ref: nand-controller.yaml# > + > +properties: > + compatible: > + enum: > + - nuvoton,ma35d1-nand-controller > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > +patternProperties: > + "^nand@[a-f0-9]$": > + type: object > + $ref: raw-nand-chip.yaml > + properties: > + nand-ecc-step-size: > + enum: [512, 1024] > + > + nand-ecc-strength: > + enum: [8, 12, 24] > + > + required: > + - nand-ecc-step-size > + - nand-ecc-strength No, they should not be required, unless there is a good reason to do so. Optimal strength is discoverable, stop forcing it by default. > + > + unevaluatedProperties: false > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/clock/nuvoton,ma35d1-clk.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + nand-controller@401A0000 { > + compatible = "nuvoton,ma35d1-nand-controller"; > + reg = <0x0 0x401A0000 0x0 0x1000>; > + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk NAND_GATE>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + nand@0 { > + reg = <0>; > + > + nand-on-flash-bbt; > + nand-ecc-step-size = <512>; > + nand-ecc-strength = <8>; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + uboot@0 { > + label = "nand-uboot"; > + read-only; > + reg = <0x0 0x300000>; > + }; > + }; > + }; > + }; > + }; > + > +... Thanks, Miquèl
Dear Miquel, Thank you for your reply. On 2024/10/1 下午 06:19, Miquel Raynal wrote: > Hi Hui-Ping, > > hpchen0nvt@gmail.com wrote on Fri, 27 Sep 2024 02:07:48 +0000: > >> Add dt-bindings for the Nuvoton MA35 SoC NAND Controller. >> >> Signed-off-by: Hui-Ping Chen <hpchen0nvt@gmail.com> >> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> --- >> .../bindings/mtd/nuvoton,ma35d1-nand.yaml | 93 +++++++++++++++++++ >> 1 file changed, 93 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml >> >> diff --git a/Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml b/Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml >> new file mode 100644 >> index 000000000000..a8a549644c98 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml >> @@ -0,0 +1,93 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/mtd/nuvoton,ma35d1-nand.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Nuvoton MA35D1 NAND Flash Interface (NFI) Controller >> + >> +maintainers: >> + - Hui-Ping Chen <hpchen0nvt@gmail.com> >> + >> +allOf: >> + - $ref: nand-controller.yaml# >> + >> +properties: >> + compatible: >> + enum: >> + - nuvoton,ma35d1-nand-controller >> + >> + reg: >> + maxItems: 1 >> + >> + interrupts: >> + maxItems: 1 >> + >> + clocks: >> + maxItems: 1 >> + >> +patternProperties: >> + "^nand@[a-f0-9]$": >> + type: object >> + $ref: raw-nand-chip.yaml >> + properties: >> + nand-ecc-step-size: >> + enum: [512, 1024] >> + >> + nand-ecc-strength: >> + enum: [8, 12, 24] >> + >> + required: >> + - nand-ecc-step-size >> + - nand-ecc-strength > No, they should not be required, unless there is a good reason to do > so. Optimal strength is discoverable, stop forcing it by default. I will remove this required. >> + >> + unevaluatedProperties: false >> + >> +required: >> + - compatible >> + - reg >> + - interrupts >> + - clocks >> + >> +unevaluatedProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/interrupt-controller/arm-gic.h> >> + #include <dt-bindings/clock/nuvoton,ma35d1-clk.h> >> + >> + soc { >> + #address-cells = <2>; >> + #size-cells = <2>; >> + >> + nand-controller@401A0000 { >> + compatible = "nuvoton,ma35d1-nand-controller"; >> + reg = <0x0 0x401A0000 0x0 0x1000>; >> + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&clk NAND_GATE>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + nand@0 { >> + reg = <0>; >> + >> + nand-on-flash-bbt; >> + nand-ecc-step-size = <512>; >> + nand-ecc-strength = <8>; >> + >> + partitions { >> + compatible = "fixed-partitions"; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + >> + uboot@0 { >> + label = "nand-uboot"; >> + read-only; >> + reg = <0x0 0x300000>; >> + }; >> + }; >> + }; >> + }; >> + }; >> + >> +... > > Thanks, > Miquèl Best regards, Hui-Ping Chen
diff --git a/Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml b/Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml new file mode 100644 index 000000000000..a8a549644c98 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/nuvoton,ma35d1-nand.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/nuvoton,ma35d1-nand.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton MA35D1 NAND Flash Interface (NFI) Controller + +maintainers: + - Hui-Ping Chen <hpchen0nvt@gmail.com> + +allOf: + - $ref: nand-controller.yaml# + +properties: + compatible: + enum: + - nuvoton,ma35d1-nand-controller + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +patternProperties: + "^nand@[a-f0-9]$": + type: object + $ref: raw-nand-chip.yaml + properties: + nand-ecc-step-size: + enum: [512, 1024] + + nand-ecc-strength: + enum: [8, 12, 24] + + required: + - nand-ecc-step-size + - nand-ecc-strength + + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/nuvoton,ma35d1-clk.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + nand-controller@401A0000 { + compatible = "nuvoton,ma35d1-nand-controller"; + reg = <0x0 0x401A0000 0x0 0x1000>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk NAND_GATE>; + #address-cells = <1>; + #size-cells = <0>; + + nand@0 { + reg = <0>; + + nand-on-flash-bbt; + nand-ecc-step-size = <512>; + nand-ecc-strength = <8>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + uboot@0 { + label = "nand-uboot"; + read-only; + reg = <0x0 0x300000>; + }; + }; + }; + }; + }; + +...