| Message ID | 20240307115315.1942678-1-miquel.raynal@bootlin.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [1/2] mtd: rawnand: Constrain even more when continuous reads are enabled | expand |
Hi Miquel, On 3/7/24 12:53, Miquel Raynal wrote: > As a matter of fact, continuous reads require additional handling at the > operation level in order for them to work properly. The core helpers do > have this additional logic now, but any time a controller implements its > own page helper, this extra logic is "lost". This means we need another > level of per-controller driver checks to ensure they can leverage > continuous reads. This is for now unsupported, so in order to ensure > continuous reads are enabled only when fully using the core page > helpers, we need to add more initial checks. > > Also, as performance is not relevant during raw accesses, we also > prevent these from enabling the feature. > > This should solve the issue seen with controllers such as the STM32 FMC2 > when in sequencer mode. In this case, the continuous read feature would > be enabled but not leveraged, and most importantly not disabled, leading > to further operations to fail. > > Reported-by: Christophe Kerello <christophe.kerello@foss.st.com> > Fixes: 003fe4b9545b ("mtd: rawnand: Support for sequential cache reads") > Cc: stable@vger.kernel.org > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Christophe Kerello <christophe.kerello@foss.st.com> Regards, Christophe Kerello. > --- > drivers/mtd/nand/raw/nand_base.c | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c > index 4d5a663e4e05..2479fa98f991 100644 > --- a/drivers/mtd/nand/raw/nand_base.c > +++ b/drivers/mtd/nand/raw/nand_base.c > @@ -3594,7 +3594,8 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from, > oob = ops->oobbuf; > oob_required = oob ? 1 : 0; > > - rawnand_enable_cont_reads(chip, page, readlen, col); > + if (likely(ops->mode != MTD_OPS_RAW)) > + rawnand_enable_cont_reads(chip, page, readlen, col); > > while (1) { > struct mtd_ecc_stats ecc_stats = mtd->ecc_stats; > @@ -5212,6 +5213,15 @@ static void rawnand_late_check_supported_ops(struct nand_chip *chip) > if (!nand_has_exec_op(chip)) > return; > > + /* > + * For now, continuous reads can only be used with the core page helpers. > + * This can be extended later. > + */ > + if (!(chip->ecc.read_page == nand_read_page_hwecc || > + chip->ecc.read_page == nand_read_page_syndrome || > + chip->ecc.read_page == nand_read_page_swecc)) > + return; > + > rawnand_check_cont_read_support(chip); > } >
On Thu, 2024-03-07 at 11:53:14 UTC, Miquel Raynal wrote: > As a matter of fact, continuous reads require additional handling at the > operation level in order for them to work properly. The core helpers do > have this additional logic now, but any time a controller implements its > own page helper, this extra logic is "lost". This means we need another > level of per-controller driver checks to ensure they can leverage > continuous reads. This is for now unsupported, so in order to ensure > continuous reads are enabled only when fully using the core page > helpers, we need to add more initial checks. > > Also, as performance is not relevant during raw accesses, we also > prevent these from enabling the feature. > > This should solve the issue seen with controllers such as the STM32 FMC2 > when in sequencer mode. In this case, the continuous read feature would > be enabled but not leveraged, and most importantly not disabled, leading > to further operations to fail. > > Reported-by: Christophe Kerello <christophe.kerello@foss.st.com> > Fixes: 003fe4b9545b ("mtd: rawnand: Support for sequential cache reads") > Cc: stable@vger.kernel.org > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > Tested-by: Christophe Kerello <christophe.kerello@foss.st.com> Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next. Miquel
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 4d5a663e4e05..2479fa98f991 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -3594,7 +3594,8 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from, oob = ops->oobbuf; oob_required = oob ? 1 : 0; - rawnand_enable_cont_reads(chip, page, readlen, col); + if (likely(ops->mode != MTD_OPS_RAW)) + rawnand_enable_cont_reads(chip, page, readlen, col); while (1) { struct mtd_ecc_stats ecc_stats = mtd->ecc_stats; @@ -5212,6 +5213,15 @@ static void rawnand_late_check_supported_ops(struct nand_chip *chip) if (!nand_has_exec_op(chip)) return; + /* + * For now, continuous reads can only be used with the core page helpers. + * This can be extended later. + */ + if (!(chip->ecc.read_page == nand_read_page_hwecc || + chip->ecc.read_page == nand_read_page_syndrome || + chip->ecc.read_page == nand_read_page_swecc)) + return; + rawnand_check_cont_read_support(chip); }
As a matter of fact, continuous reads require additional handling at the operation level in order for them to work properly. The core helpers do have this additional logic now, but any time a controller implements its own page helper, this extra logic is "lost". This means we need another level of per-controller driver checks to ensure they can leverage continuous reads. This is for now unsupported, so in order to ensure continuous reads are enabled only when fully using the core page helpers, we need to add more initial checks. Also, as performance is not relevant during raw accesses, we also prevent these from enabling the feature. This should solve the issue seen with controllers such as the STM32 FMC2 when in sequencer mode. In this case, the continuous read feature would be enabled but not leveraged, and most importantly not disabled, leading to further operations to fail. Reported-by: Christophe Kerello <christophe.kerello@foss.st.com> Fixes: 003fe4b9545b ("mtd: rawnand: Support for sequential cache reads") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/mtd/nand/raw/nand_base.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)