diff mbox series

[v3] mtd: spinand: micron: correct bitmask for ecc status

Message ID 20230905145637.139068-1-mmkurbanov@sberdevices.ru
State Accepted
Headers show
Series [v3] mtd: spinand: micron: correct bitmask for ecc status | expand

Commit Message

Martin Kurbanov Sept. 5, 2023, 2:56 p.m. UTC 
Valid bitmask is 0x70 in the status register.

Fixes: a508e8875e13 ("mtd: spinand: Add initial support for Micron MT29F2G01ABAGD")
Signed-off-by: Martin Kurbanov <mmkurbanov@sberdevices.ru>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
---
Changes v3 since v2 at [1]:
  - Remove the commit for fixing OOB layout.
  - Add Fixes tag.

Changes v2 since v1 at [2]:
  - Split into two individual patches.
  - Remove the fix for using only non-protected ECC bytes from OOB area.

Links:
  [1] https://lore.kernel.org/all/20230822122534.872646-1-mmkurbanov@sberdevices.ru/
  [2] https://lore.kernel.org/all/20230815161024.810729-1-mmkurbanov@sberdevices.ru/

 drivers/mtd/nand/spi/micron.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--
2.40.0

Comments

Miquel Raynal Sept. 11, 2023, 3:51 p.m. UTC | #1 
On Tue, 2023-09-05 at 14:56:37 UTC, Martin Kurbanov wrote:
> Valid bitmask is 0x70 in the status register.
> 
> Fixes: a508e8875e13 ("mtd: spinand: Add initial support for Micron MT29F2G01ABAGD")
> Signed-off-by: Martin Kurbanov <mmkurbanov@sberdevices.ru>
> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>

Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git mtd/fixes, thanks.

Miquel
diff mbox series

Patch

diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
index 50b7295bc922..12601bc4227a 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -12,7 +12,7 @@ 

 #define SPINAND_MFR_MICRON		0x2c

-#define MICRON_STATUS_ECC_MASK		GENMASK(7, 4)
+#define MICRON_STATUS_ECC_MASK		GENMASK(6, 4)
 #define MICRON_STATUS_ECC_NO_BITFLIPS	(0 << 4)
 #define MICRON_STATUS_ECC_1TO3_BITFLIPS	(1 << 4)
 #define MICRON_STATUS_ECC_4TO6_BITFLIPS	(3 << 4)