Message ID | 20230807-mtd-flash-info-db-rework-v2-4-291a0f39f8d8@kernel.org |
---|---|
State | Changes Requested |
Delegated to: | Ambarus Tudor |
Headers | show |
Series | mtd: spi-nor: clean the flash_info database up | expand |
On 8/22/23 08:09, Michael Walle wrote: > The default value of addr_nbytes is already 3. Drop it. > > Signed-off-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> I noticed that we need this fix in the core. I'll have to think whether we need to introduce nor->addr_mode_nbytes as well. I let this for after I finish reviewing your series. diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 1b0c6770c14e..85e2a992a9b0 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -3221,6 +3221,7 @@ static int spi_nor_init(struct spi_nor *nor) err = spi_nor_set_4byte_addr_mode(nor, true); if (err) return err; + nor->addr_nbytes = nor->params->addr_nbytes; } > --- > drivers/mtd/spi-nor/xilinx.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c > index de5189c38432..34267591282c 100644 > --- a/drivers/mtd/spi-nor/xilinx.c > +++ b/drivers/mtd/spi-nor/xilinx.c > @@ -27,7 +27,6 @@ > .n_sectors = (_n_sectors), \ > .page_size = (_page_size), \ > .n_banks = 1, \ > - .addr_nbytes = 3, \ > .flags = SPI_NOR_NO_FR > > /* Xilinx S3AN share MFR with Atmel SPI NOR */ >
diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index de5189c38432..34267591282c 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -27,7 +27,6 @@ .n_sectors = (_n_sectors), \ .page_size = (_page_size), \ .n_banks = 1, \ - .addr_nbytes = 3, \ .flags = SPI_NOR_NO_FR /* Xilinx S3AN share MFR with Atmel SPI NOR */
The default value of addr_nbytes is already 3. Drop it. Signed-off-by: Michael Walle <mwalle@kernel.org> --- drivers/mtd/spi-nor/xilinx.c | 1 - 1 file changed, 1 deletion(-)