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Tue, 22 Aug 2023 07:10:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1692688234; bh=EyuDNaE5JOFL0ZQ/K44CuNRKS87m9hVeJq1QWqZcq6Y=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=sp7b3u+PWApSoU/k5kQtDAbpB3iK5by3FUYfWHuflSPkPDiJHvzuE8107LItsmPX9 os1bPIEs6+lQguKVm+Dvf/Na9v7xZsUAJumSxTfjYvOIayeLejIFXWzeiLcIBxPcJG YIafoDOTy/PV8SuNu9H8WHJtdwwpGt6Xo0ppp5yme0Chpcu2JENtM0Zp0dO5ooqtfU uyVQbThIvukFSCfosNt4UgBy+5myyWJus8LRMwyfLHMIBdoTLpnoiyUp4HJijLpLrz 6yPJz0hF2zTKnmHJfW3K7dZQ80xg9+Bd6YYAKauwwb8045/v3JUrRKsJGpH7WVZAXG XZitwFwwH2CsA== From: Michael Walle Date: Tue, 22 Aug 2023 09:09:45 +0200 Subject: [PATCH v2 29/41] mtd: spi-nor: xilinx: use new macros in S3AN_INFO() MIME-Version: 1.0 Message-Id: <20230807-mtd-flash-info-db-rework-v2-29-291a0f39f8d8@kernel.org> References: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> In-Reply-To: <20230807-mtd-flash-info-db-rework-v2-0-291a0f39f8d8@kernel.org> To: Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Michael Walle X-Mailer: b4 0.12.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230822_081036_986732_73BD9E23 X-CRM114-Status: GOOD ( 11.94 ) X-Spam-Score: -2.5 (--) X-Spam-Report: Spam detection software, running on the system "desiato.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: There won't be any new entries, nor are the entries that much different and the very odd page and sector sizes make the new format hard to read. Therefore, convert the old S3AN_INFO() macro. Signed-off-by: Michael Walle --- This collides with the atmel flashes and there seems to be a typo in the IDs. All this makes me wonder wether we shouldn't deprecate the support fo [...] Content analysis details: (-2.5 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [2604:1380:4641:c500:0:0:0:1 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.0 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org There won't be any new entries, nor are the entries that much different and the very odd page and sector sizes make the new format hard to read. Therefore, convert the old S3AN_INFO() macro. Signed-off-by: Michael Walle --- This collides with the atmel flashes and there seems to be a typo in the IDs. All this makes me wonder wether we shouldn't deprecate the support for this (FPGA configuration) flash. --- drivers/mtd/spi-nor/xilinx.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c index 8d4539e32dfe..f99118c691b0 100644 --- a/drivers/mtd/spi-nor/xilinx.c +++ b/drivers/mtd/spi-nor/xilinx.c @@ -21,21 +21,22 @@ SPI_MEM_OP_NO_DUMMY, \ SPI_MEM_OP_DATA_IN(1, buf, 0)) -#define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \ - SPI_NOR_ID(_jedec_id, 0), \ - .size = 8 * (_page_size) * (_n_sectors), \ - .sector_size = (8 * (_page_size)), \ - .page_size = (_page_size), \ - .flags = SPI_NOR_NO_FR +#define S3AN_FLASH(_id, _name, _n_sectors, _page_size) \ + .id = _id, \ + .name = _name, \ + .size = 8 * (_page_size) * (_n_sectors), \ + .sector_size = (8 * (_page_size)), \ + .page_size = (_page_size), \ + .flags = SPI_NOR_NO_FR /* Xilinx S3AN share MFR with Atmel SPI NOR */ static const struct flash_info xilinx_nor_parts[] = { /* Xilinx S3AN Internal Flash */ - { "3S50AN", S3AN_INFO(0x1f2200, 64, 264) }, - { "3S200AN", S3AN_INFO(0x1f2400, 256, 264) }, - { "3S400AN", S3AN_INFO(0x1f2400, 256, 264) }, - { "3S700AN", S3AN_INFO(0x1f2500, 512, 264) }, - { "3S1400AN", S3AN_INFO(0x1f2600, 512, 528) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x22, 0x00), "3S50AN", 64, 264) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x24, 0x00), "3S200AN", 256, 264) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x24, 0x00), "3S400AN", 256, 264) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x25, 0x00), "3S700AN", 512, 264) }, + { S3AN_FLASH(SNOR_ID(0x1f, 0x26, 0x00), "3S1400AN", 512, 528) }, }; /*