@@ -193,6 +193,17 @@ static int spinand_init_quad_enable(struct spinand_device *spinand)
enable ? CFG_QUAD_ENABLE : 0);
}
+static int spinand_continuous_read_enable(struct spinand_device *spinand)
+{
+ return spinand_upd_cfg(spinand, CFG_CONT_READ_ENABLE,
+ CFG_CONT_READ_ENABLE);
+}
+
+static int spinand_continuous_read_disable(struct spinand_device *spinand)
+{
+ return spinand_upd_cfg(spinand, CFG_CONT_READ_ENABLE, 0);
+}
+
static int spinand_ecc_enable(struct spinand_device *spinand,
bool enable)
{
@@ -154,6 +154,7 @@
#define REG_CFG 0xb0
#define CFG_OTP_ENABLE BIT(6)
#define CFG_ECC_ENABLE BIT(4)
+#define CFG_CONT_READ_ENABLE BIT(2)
#define CFG_QUAD_ENABLE BIT(0)
/* status register */
The patch supports setting the "CONT" bit of the configuration register and create spinand_continuous_read_enable/disable functions. Signed-off-by: Jaime Liao <jaimeliao.tw@gmail.com> --- drivers/mtd/nand/spi/core.c | 11 +++++++++++ include/linux/mtd/spinand.h | 1 + 2 files changed, 12 insertions(+)