diff mbox series

[v14,07/15] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode

Message ID 20200930185732.6201-8-p.yadav@ti.com
State Superseded
Delegated to: Ambarus Tudor
Headers show
Series mtd: spi-nor: add xSPI Octal DTR support | expand

Commit Message

Pratyush Yadav Sept. 30, 2020, 6:57 p.m. UTC
Some controllers, like the cadence qspi controller, have trouble reading
only 1 byte in DTR mode. So, do 2 byte reads for SR and FSR commands in
DTR mode, and then discard the second byte.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
 drivers/mtd/spi-nor/core.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

Comments

Tudor Ambarus Oct. 1, 2020, 7:52 a.m. UTC | #1
On 9/30/20 9:57 PM, Pratyush Yadav wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Some controllers, like the cadence qspi controller, have trouble reading
> only 1 byte in DTR mode. So, do 2 byte reads for SR and FSR commands in
> DTR mode, and then discard the second byte.
> 
> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>

Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>

> ---
>  drivers/mtd/spi-nor/core.c | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 1465cf80f978..73a26e7e32c2 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -370,7 +370,7 @@ int spi_nor_write_disable(struct spi_nor *nor)
>   * spi_nor_read_sr() - Read the Status Register.
>   * @nor:       pointer to 'struct spi_nor'.
>   * @sr:                pointer to a DMA-able buffer where the value of the
> - *              Status Register will be written.
> + *              Status Register will be written. Should be at least 2 bytes.
>   *
>   * Return: 0 on success, -errno otherwise.
>   */
> @@ -388,6 +388,11 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
>                 if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) {
>                         op.addr.nbytes = nor->params->rdsr_addr_nbytes;
>                         op.dummy.nbytes = nor->params->rdsr_dummy;
> +                       /*
> +                        * We don't want to read only one byte in DTR mode. So,
> +                        * read 2 and then discard the second byte.
> +                        */
> +                       op.data.nbytes = 2;
>                 }
> 
>                 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
> @@ -408,7 +413,8 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
>   * spi_nor_read_fsr() - Read the Flag Status Register.
>   * @nor:       pointer to 'struct spi_nor'
>   * @fsr:       pointer to a DMA-able buffer where the value of the
> - *              Flag Status Register will be written.
> + *              Flag Status Register will be written. Should be at least 2
> + *              bytes.
>   *
>   * Return: 0 on success, -errno otherwise.
>   */
> @@ -426,6 +432,11 @@ static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr)
>                 if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) {
>                         op.addr.nbytes = nor->params->rdsr_addr_nbytes;
>                         op.dummy.nbytes = nor->params->rdsr_dummy;
> +                       /*
> +                        * We don't want to read only one byte in DTR mode. So,
> +                        * read 2 and then discard the second byte.
> +                        */
> +                       op.data.nbytes = 2;
>                 }
> 
>                 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
> --
> 2.28.0
>
diff mbox series

Patch

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 1465cf80f978..73a26e7e32c2 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -370,7 +370,7 @@  int spi_nor_write_disable(struct spi_nor *nor)
  * spi_nor_read_sr() - Read the Status Register.
  * @nor:	pointer to 'struct spi_nor'.
  * @sr:		pointer to a DMA-able buffer where the value of the
- *              Status Register will be written.
+ *              Status Register will be written. Should be at least 2 bytes.
  *
  * Return: 0 on success, -errno otherwise.
  */
@@ -388,6 +388,11 @@  static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
 		if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) {
 			op.addr.nbytes = nor->params->rdsr_addr_nbytes;
 			op.dummy.nbytes = nor->params->rdsr_dummy;
+			/*
+			 * We don't want to read only one byte in DTR mode. So,
+			 * read 2 and then discard the second byte.
+			 */
+			op.data.nbytes = 2;
 		}
 
 		spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
@@ -408,7 +413,8 @@  static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
  * spi_nor_read_fsr() - Read the Flag Status Register.
  * @nor:	pointer to 'struct spi_nor'
  * @fsr:	pointer to a DMA-able buffer where the value of the
- *              Flag Status Register will be written.
+ *              Flag Status Register will be written. Should be at least 2
+ *              bytes.
  *
  * Return: 0 on success, -errno otherwise.
  */
@@ -426,6 +432,11 @@  static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr)
 		if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) {
 			op.addr.nbytes = nor->params->rdsr_addr_nbytes;
 			op.dummy.nbytes = nor->params->rdsr_dummy;
+			/*
+			 * We don't want to read only one byte in DTR mode. So,
+			 * read 2 and then discard the second byte.
+			 */
+			op.data.nbytes = 2;
 		}
 
 		spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);