From patchwork Mon May 18 16:28:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 1292659 X-Patchwork-Delegate: miquel.raynal@bootlin.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20170209 header.b=tiCEWpC7; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:e::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49Qkz34kS0z9sT8 for ; Tue, 19 May 2020 02:30:55 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=gZGoODk14ADa+Q7CCwmI4oPxhb7Y4AGIqiFh+VOsJOw=; b=tiCEWpC7qMAOXP d4fZfeY/EsSAr8/qatU5Xvp7B8Lwb7jJ49mGYRVlHRqOvtXovITFt/A4q4CNexNlcU3bwgaho/qNm 4CVDUcIli/gqNFzkEwtt/COYww3IjAxDs6Riueo4J5cLFHGknd//vJJXNqOVE/KsO68RURy0xaGyy PBC2t9TyICtCfKMnGCkJn83aG8QHPwGHN9Yu3LXP2lzSIwgas5MTK5QqLSrqnJILFADkBFJmENv5B akIXf0xhIroS4aWOOV2k93l9AXJOyKLj4ITYIFVyayxqXA+z+QsbE32Vb6V2vFyt0eKt3wAeSooW2 lhtY66G7fuyzesXB91qQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jaif2-0001vI-Qp; Mon, 18 May 2020 16:30:40 +0000 Received: from bhuna.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e3e3]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jaidB-0006I5-Jz for linux-mtd@lists.infradead.org; Mon, 18 May 2020 16:28:48 +0000 Received: from localhost.localdomain (unknown [IPv6:2a01:e0a:2c:6930:5cf4:84a1:2763:fe0d]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: bbrezillon) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 131EB2A0B14; Mon, 18 May 2020 17:28:43 +0100 (BST) From: Boris Brezillon To: Miquel Raynal , linux-mtd@lists.infradead.org, Hauke Mehrtens , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , linux-mips@vger.kernel.org Subject: [PATCH v2 5/8] mtd: rawnand: bcm47xx: Implement the exec_op() interface Date: Mon, 18 May 2020 18:28:34 +0200 Message-Id: <20200518162837.304471-6-boris.brezillon@collabora.com> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200518162837.304471-1-boris.brezillon@collabora.com> References: <20200518162837.304471-1-boris.brezillon@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200518_092845_932373_77854759 X-CRM114-Status: GOOD ( 18.49 ) X-Spam-Score: -0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Weinberger , Boris Brezillon , Vignesh Raghavendra , Tudor Ambarus Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Implement the exec_op() interface so we can get rid of the convoluted cmdfunc() implementation. Signed-off-by: Boris Brezillon --- This is based on my understanding of how this controller works, and I think it covers all the use cases covered by the custom cmdfunc() implementation. I might be wrong of course, so it'd be great to have someone test on real HW. Changes in v2: * s/i/j/ in exec_cmd_addr() * Drop WARN_ON()s --- .../nand/raw/bcm47xxnflash/bcm47xxnflash.h | 1 + .../mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c | 140 ++++++++++++++++++ 2 files changed, 141 insertions(+) diff --git a/drivers/mtd/nand/raw/bcm47xxnflash/bcm47xxnflash.h b/drivers/mtd/nand/raw/bcm47xxnflash/bcm47xxnflash.h index 201b9baa52a0..00d0974b73cb 100644 --- a/drivers/mtd/nand/raw/bcm47xxnflash/bcm47xxnflash.h +++ b/drivers/mtd/nand/raw/bcm47xxnflash/bcm47xxnflash.h @@ -10,6 +10,7 @@ #include struct bcm47xxnflash { + struct nand_controller base; struct bcma_drv_cc *cc; struct nand_chip nand_chip; diff --git a/drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c b/drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c index 543fcff6e4d2..edf0c3d7b561 100644 --- a/drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c +++ b/drivers/mtd/nand/raw/bcm47xxnflash/ops_bcm4706.c @@ -382,6 +382,143 @@ static void bcm47xxnflash_ops_bcm4706_write_buf(struct nand_chip *nand_chip, pr_err("Invalid command for buf write: 0x%X\n", b47n->curr_command); } +static int +bcm47xxnflash_ops_bcm4706_exec_cmd_addr(struct nand_chip *chip, + const struct nand_subop *subop) +{ + struct bcm47xxnflash *b47n = nand_get_controller_data(chip); + u32 nctl = 0, col = 0, row = 0, ncols = 0, nrows = 0; + unsigned int i, j; + + for (i = 0; i < subop->ninstrs; i++) { + const struct nand_op_instr *instr = &subop->instrs[i]; + + switch (instr->type) { + case NAND_OP_CMD_INSTR: + if (WARN_ON_ONCE((nctl & NCTL_CMD0) && + (nctl & NCTL_CMD1W))) + return -EINVAL; + else if (nctl & NCTL_CMD0) + nctl |= NCTL_CMD1W | + ((u32)instr->ctx.cmd.opcode << 8); + else + nctl |= NCTL_CMD0 | instr->ctx.cmd.opcode; + break; + case NAND_OP_ADDR_INSTR: + for (j = 0; j < instr->ctx.addr.naddrs; j++) { + u32 addr = instr->ctx.addr.addrs[j]; + + if (j < 2) { + col |= addr << (j * 8); + nctl |= NCTL_COL; + ncols++; + } else { + row |= addr << ((j - 2) * 8); + nctl |= NCTL_ROW; + nrows++; + } + } + break; + default: + return -EINVAL; + } + } + + /* Keep the CS line asserted if there's something else to execute. */ + if (!subop->is_last) + nctl |= NCTL_CSA; + + bcma_cc_write32(b47n->cc, BCMA_CC_NFLASH_CONF, + CONF_MAGIC_BIT | + CONF_COL_BYTES(ncols) | + CONF_ROW_BYTES(nrows)); + return bcm47xxnflash_ops_bcm4706_ctl_cmd(b47n->cc, nctl); +} + +static int +bcm47xxnflash_ops_bcm4706_exec_waitrdy(struct nand_chip *chip, + const struct nand_subop *subop) +{ + struct bcm47xxnflash *b47n = nand_get_controller_data(chip); + const struct nand_op_instr *instr = &subop->instrs[0]; + unsigned long timeout_jiffies = jiffies; + + timeout_jiffies += msecs_to_jiffies(instr->ctx.waitrdy.timeout_ms) + 1; + do { + if (bcma_cc_read32(b47n->cc, BCMA_CC_NFLASH_CTL) & NCTL_READY) + return 0; + + usleep_range(10, 100); + } while (time_before(jiffies, timeout_jiffies)); + + return -ETIMEDOUT; +} + +static int +bcm47xxnflash_ops_bcm4706_exec_rw(struct nand_chip *chip, + const struct nand_subop *subop) +{ + struct bcm47xxnflash *b47n = nand_get_controller_data(chip); + const struct nand_op_instr *instr = &subop->instrs[0]; + unsigned int i; + int ret; + + for (i = 0; i < instr->ctx.data.len; i += 4) { + unsigned int nbytes = min_t(unsigned int, + instr->ctx.data.len - i, 4); + u32 nctl, data; + + nctl = NCTL_CSA | NCTL_DATA_CYCLES(nbytes); + if (instr->type == NAND_OP_DATA_IN_INSTR) { + nctl |= NCTL_READ; + } else { + nctl |= NCTL_WRITE; + memcpy(&data, instr->ctx.data.buf.in + i, nbytes); + bcma_cc_write32(b47n->cc, BCMA_CC_NFLASH_DATA, data); + } + + if (i + nbytes < instr->ctx.data.len) + nctl |= NCTL_CSA; + + ret = bcm47xxnflash_ops_bcm4706_ctl_cmd(b47n->cc, nctl); + if (ret) + return ret; + + if (instr->type == NAND_OP_DATA_IN_INSTR) { + data = bcma_cc_read32(b47n->cc, BCMA_CC_NFLASH_DATA); + memcpy(instr->ctx.data.buf.in + i, &data, nbytes); + } + } + + return 0; +} + +static const struct nand_op_parser bcm47xxnflash_op_parser = NAND_OP_PARSER( + NAND_OP_PARSER_PATTERN(bcm47xxnflash_ops_bcm4706_exec_cmd_addr, + NAND_OP_PARSER_PAT_CMD_ELEM(true), + NAND_OP_PARSER_PAT_ADDR_ELEM(true, 5), + NAND_OP_PARSER_PAT_CMD_ELEM(true)), + NAND_OP_PARSER_PATTERN(bcm47xxnflash_ops_bcm4706_exec_waitrdy, + NAND_OP_PARSER_PAT_WAITRDY_ELEM(false)), + NAND_OP_PARSER_PATTERN(bcm47xxnflash_ops_bcm4706_exec_rw, + NAND_OP_PARSER_PAT_DATA_IN_ELEM(false, 0x200)), + NAND_OP_PARSER_PATTERN(bcm47xxnflash_ops_bcm4706_exec_rw, + NAND_OP_PARSER_PAT_DATA_OUT_ELEM(false, 0x200)), +); + +static int +bcm47xxnflash_ops_bcm4706_exec_op(struct nand_chip *chip, + const struct nand_operation *op, + bool check_only) +{ + return nand_op_parser_exec_op(chip, &bcm47xxnflash_op_parser, op, + check_only); +} + +static const struct nand_controller_ops bcm47xxnflash_ops = { + .exec_op = bcm47xxnflash_ops_bcm4706_exec_op, +}; + /************************************************** * Init **************************************************/ @@ -398,6 +535,9 @@ int bcm47xxnflash_ops_bcm4706_init(struct bcm47xxnflash *b47n) u8 tbits, col_bits, col_size, row_bits, row_bsize; u32 val; + nand_controller_init(&b47n->base); + b47n->base.ops = &bcm47xxnflash_ops; + b47n->nand_chip.controller = &b47n->base; nand_chip->legacy.select_chip = bcm47xxnflash_ops_bcm4706_select_chip; nand_chip->legacy.cmd_ctrl = bcm47xxnflash_ops_bcm4706_cmd_ctrl; nand_chip->legacy.dev_ready = bcm47xxnflash_ops_bcm4706_dev_ready;