@@ -10,6 +10,7 @@
*/
#include <linux/bug.h>
+#include <linux/clk.h>
#include <linux/device.h>
#include <linux/io.h>
#include <linux/module.h>
@@ -113,6 +114,8 @@ struct aspeed_smc_controller {
void __iomem *ahb_base; /* per-chip windows resource */
u32 ahb_window_size; /* full mapping window size */
+ unsigned long clk_frequency;
+
struct aspeed_smc_chip *chips[0]; /* pointers to attached chips */
};
@@ -911,6 +914,7 @@ static int aspeed_smc_probe(struct platform_device *pdev)
struct aspeed_smc_controller *controller;
const struct of_device_id *match;
const struct aspeed_smc_info *info;
+ struct clk *clk;
struct resource *res;
int ret;
@@ -942,6 +946,12 @@ static int aspeed_smc_probe(struct platform_device *pdev)
controller->ahb_window_size = resource_size(res);
+ clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(clk))
+ return PTR_ERR(clk);
+ controller->clk_frequency = clk_get_rate(clk);
+ devm_clk_put(&pdev->dev, clk);
+
ret = aspeed_smc_setup_flash(controller, np, res);
if (ret)
dev_err(dev, "Aspeed SMC probe failed %d\n", ret);
We will need the AHB frequency to set the SPI clock frequency to perform the SPI calibration sequence and optimize the controller settings for the fast reads. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- drivers/mtd/spi-nor/aspeed-smc.c | 10 ++++++++++ 1 file changed, 10 insertions(+)