Message ID | 1348650306-15492-1-git-send-email-hechtb@gmail.com |
---|---|
State | New, archived |
Headers | show |
diff --git a/drivers/mtd/nand/sh_flctl.c b/drivers/mtd/nand/sh_flctl.c index 0d90af8..8f0bed1 100644 --- a/drivers/mtd/nand/sh_flctl.c +++ b/drivers/mtd/nand/sh_flctl.c @@ -970,6 +970,7 @@ static int flctl_chip_init_tail(struct mtd_info *mtd) } } else { flctl->page_size = 1; + flctl->flcmncr_base |= SNAND_E; if (chip->chipsize > (128 << 20)) { /* big than 128MB */ flctl->rw_ADRCNT = ADRCNT2_E;
SNAND_E indicates whether we deal with 512kB or 2048kB page sizes. We can probe this from the NAND chip itself and don't need to specify it in the platform data anymore. Signed-off-by: Bastian Hecht <hechtb@gmail.com> --- Based on l2-mtd with reverted commit e26c113b4130aefa1d8446602bb5b05cfd646bfe and the 2 patches posted 3 days ago (09/23) mtd: sh_flctl: Setup and release DMA channels and mtd: sh_flctl: Use DMA for data fifo FLTDFIFO when available drivers/mtd/nand/sh_flctl.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)