Message ID | cover.1680749577.git.Takahiro.Kuwano@infineon.com |
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Headers | show
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[49.98.38.119]) by smtp.gmail.com with ESMTPSA id 18-20020aa79152000000b0062dbafd2980sm450542pfi.65.2023.04.05.23.19.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Apr 2023 23:19:15 -0700 (PDT) From: tkuw584924@gmail.com X-Google-Original-From: Takahiro.Kuwano@infineon.com To: linux-mtd@lists.infradead.org Cc: tudor.ambarus@linaro.org, pratyush@kernel.org, michael@walle.cc, miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com, d-gole@ti.com, tkuw584924@gmail.com, Bacem.Daassi@infineon.com, Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Subject: [PATCH v3 0/8] mtd: spi-nor: Add support for Infineon SEMPER s25hl02gt and s25hs02gt Date: Thu, 6 Apr 2023 15:18:51 +0900 Message-Id: <cover.1680749577.git.Takahiro.Kuwano@infineon.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230405_231920_482752_4C1A1F79 X-CRM114-Status: GOOD ( 16.16 ) X-Spam-Score: 0.1 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. 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Content preview: From: Takahiro Kuwano Infineon SEMPER s25hl02gt and s25hs02gt are multi-chip (dual-die) package parts and the datasheet can be found at: https://www.infineon.com/dgdl/Infineon-S25HS02GT_S25HS04GT_S25HL02GT_S25HL04GT_2-Gb_D [...] Content analysis details: (0.1 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:1036 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [tkuw584924[at]gmail.com] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [tkuw584924[at]gmail.com] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list <linux-mtd.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-mtd>, <mailto:linux-mtd-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/linux-mtd/> List-Post: <mailto:linux-mtd@lists.infradead.org> List-Help: <mailto:linux-mtd-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-mtd>, <mailto:linux-mtd-request@lists.infradead.org?subject=subscribe> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-mtd" <linux-mtd-bounces@lists.infradead.org> Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org |
Series |
mtd: spi-nor: Add support for Infineon SEMPER s25hl02gt and s25hs02gt
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From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Infineon SEMPER s25hl02gt and s25hs02gt are multi-chip (dual-die) package parts and the datasheet can be found at: https://www.infineon.com/dgdl/Infineon-S25HS02GT_S25HS04GT_S25HL02GT_S25HL04GT_2-Gb_DDP_4-Gb_QDP_HS-T_1.8-V_HL-T_3_0-V_Semper_Flash_with_Quad_SPI-DataSheet-v01_00-EN.pdf?fileId=8ac78c8c7e7124d1017f01b9a5055b7b The key characteristics of multi-chip devices are: - Each die has dedicataed registers so we need to configure and check registers in all the dice - Read ops can cross the die boundary - 4-byte address mode by default - Legacy chip-erase command is not supported To support multi-chip devices, core and sfdp need to determine the number of dice and volatile register offset for each die. The SCCR map and newly added SCCR map for multi-chip params in SFDP helps to do it. In manufacturer specific code (spansion.c), configuration and status check are updated to support multi-chip. The s25hl02gt and s25hs02gt support chip-erase-addressed command followed by die address instead of legacy chip-erase command. This series does not add support for chip-erase-addressed. Another patch set may be created to introduced how we can utilise that command. Tested with Xilinx Zynq-7000 platform. Existing devices that share the same manufacturer code (S25Hx-T and S28HS512T) are also tested. Changes in v3 - include Tudor's prerequisite patches: "mtd: spi-nor: spansion: Rename method to cypress_nor_get_page_size" "mtd: spi-nor: Allow post_sfdp hook to return errors" - s/num_of_dice/n_dice - fix typos in "mtd: spi-nor: core: Introduce number of dice and volatile register offset params" - use SFDP_DWORD() for SFDP indexes - limit the number of dices to 256 as a higher number of dices is improbable, thus we assume the table value is wrong - reworked common methods for multi-chip devices and single chip devices. When SCCR or SCCR_MC are fined use the value of the Volatile Register offsets defined in the tables, otherwise use the statically defined ones from the driver. Changes in v2: - s/return 0/continue in cypress_nor_quad_enable_volatile() - Stop introducing DEF_4BAM flag. Handle it in post_bfpt_fixup() instead ID, SFDP, and test log: -------------------------------------------------------------------------- zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname s25hl02gt zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id 342a1c0f0090 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer spansion zynq> xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 53464450080104ff00080114000100ff84000102500100ff81000118e001 00ff8700011c580100ff88000106c80100ffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffe720faffffffff7f48eb086b00ff 88bbfeffffffffff00ffffff48eb0c2000ff00ff12d823faff8b82e7ffec ec031c608a857a75f766805c8cd6ddfff938c0a1000000000000bc000000 0000f7f5ffff7b920ffe21ffffdc0000800000000000c0ffc3fbc8ffe3fb 00650090066500b10065009600650095716503d0716503d000000000b02e 000088a489aa716503967165039600000000000000000000000000000000 000000000000000000000000000000000000000000000000716505d57165 05d50000a015000080080000000800008010000000100000801800000018 fc65ff0804008000fc65ff0402008000fc65ff0804008008fd65ff040200 8008fe0202fff1ff0100f8ff0100f8fffb0ffe0902fff8fffb0ff8ff0100 f1ff0100fe0104fff1ff0100f8ff0100f8fff70ff8ff0100f1ff0100ff0a 00fff8ffff0f zynq> md5sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 86aef254bcfdf763bdb92e4c31667242 /sys/bus/spi/devices/spi0.0/spi-nor/sfdp zynq> test_qspi.sh 6+0 records in 6+0 records out 6291456 bytes (6.0MB) copied, 0.231488 seconds, 25.9MB/s Copied 6291456 bytes from qspi_test to address 0x00000000 in flash Erased 6291456 bytes from address 0x00000000 in flash Copied 6291456 bytes from address 0x00000000 in flash to qspi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0600000 Copied 6291456 bytes from qspi_test to address 0x00000000 in flash Copied 6291456 bytes from address 0x00000000 in flash to qspi_read 9f433bd1566013c98b94f5ff441859314c1fc7d6 qspi_test 9f433bd1566013c98b94f5ff441859314c1fc7d6 qspi_read -------------------------------------------------------------------------- zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname s25hs02gt zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id 342b1c0f0090 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer spansion zynq> xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 53464450080104ff00080114000100ff84000102500100ff81000118e001 00ff8700011c580100ff88000106c80100ffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff ffffffffffffffffffffffffffffffffe720faffffffff7f48eb086b00ff 88bbfeffffffffff00ffffff48eb0c2000ff00ff12d823faff8b82e7ffec ec031c608a857a75f766805c8cd6ddfff938c0a1000000000000bc000000 0000f7f5ffff7b920ffe21ffffdc0000800000000000c0ffc3fbc8ffe3fb 00650090066500b10065009600650095716503d0716503d000000000b02e 000088a489aa716503967165039600000000000000000000000000000000 000000000000000000000000000000000000000000000000716505d57165 05d50000a015000080080000000800008010000000100000801800000018 fc65ff0804008000fc65ff0402008000fc65ff0804008008fd65ff040200 8008fe0202fff1ff0100f8ff0100f8fffb0ffe0902fff8fffb0ff8ff0100 f1ff0100fe0104fff1ff0100f8ff0100f8fff70ff8ff0100f1ff0100ff0a 00fff8ffff0f zynq> md5sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 86aef254bcfdf763bdb92e4c31667242 /sys/bus/spi/devices/spi0.0/spi-nor/sfdp zynq> test_qspi.sh 6+0 records in 6+0 records out 6291456 bytes (6.0MB) copied, 0.231691 seconds, 25.9MB/s Copied 6291456 bytes from qspi_test to address 0x00000000 in flash Erased 6291456 bytes from address 0x00000000 in flash Copied 6291456 bytes from address 0x00000000 in flash to qspi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0600000 Copied 6291456 bytes from qspi_test to address 0x00000000 in flash Copied 6291456 bytes from address 0x00000000 in flash to qspi_read 58b52b293f93574507b6ffb06f0e79b57b0f1f28 qspi_test 58b52b293f93574507b6ffb06f0e79b57b0f1f28 qspi_read -------------------------------------------------------------------------- Takahiro Kuwano (6): mtd: spi-nor: Extract volatile register offset from SCCR map mtd: spi-nor: sfdp: Add support for SCCR map for multi-chip device mtd: spi-nor: spansion: Rework cypress_nor_set_page_size() for multi-chip device support mtd: spi-nor: spansion: Rework cypress_nor_quad_enable_volatile() for multi-chip device support mtd: spi-nor: spansion: Add a new ->ready() hook for multi-chip device mtd: spi-nor: spansion: Add support for Infineon Tudor Ambarus (2): mtd: spi-nor: spansion: Rename method to cypress_nor_get_page_size mtd: spi-nor: Allow post_sfdp hook to return errors drivers/mtd/spi-nor/core.h | 6 +- drivers/mtd/spi-nor/micron-st.c | 4 +- drivers/mtd/spi-nor/sfdp.c | 103 +++++++++++- drivers/mtd/spi-nor/spansion.c | 281 ++++++++++++++++++++++++-------- 4 files changed, 319 insertions(+), 75 deletions(-)