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From: Pratyush Yadav
To: Tudor Ambarus , Miquel Raynal
, Richard Weinberger , Vignesh
Raghavendra ,
,
Subject: [PATCH v2 0/3] mtd: Make sure UBIFS does not do multi-pass page
programming on flashes that don't support it
Date: Wed, 18 Nov 2020 23:54:56 +0530
Message-ID: <20201118182459.18197-1-p.yadav@ti.com>
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Cc: Pratyush Yadav
Sender: "linux-mtd"
Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org
Hi,
The Cypress Semper S28 flash family uses 2-bit ECC by default. Under
this ECC scheme, multi-pass page programs result in a program error.
This means that unlike many other SPI NOR flashes, bit-walking cannot be
done. In other words, once a page is programmed, its bits cannot then be
flipped to 0 without an erase in between.
This causes problems with UBIFS because it uses bit-walking to clear EC
and VID magic numbers from a PEB before issuing an erase to preserve the
file system correctness in case of power cuts.
This series fixes that by setting mtd->writesize to the ECC block size
(16) and making sure UBIFS does not try to do a multi-pass write on
flashes with writesize > 1.
It is based on the xSPI/8D series that adds support for Cypress S28
flash [0] (it is in next now). The patches themselves are independent of
that series in the sense that they don't rely on 8D support. But since
S28 flash is not supported without that series, these patches don't make
much sense without it.
Tested on Cypress S28HS512T and MT35XU512ABA on J7200 and J721E
respectively.
[0] https://lore.kernel.org/linux-mtd/20201005153138.6437-1-p.yadav@ti.com/
Pratyush Yadav (3):
UBI: Do not zero out EC and VID on ECC-ed NOR flashes
mtd: spi-nor: core: Allow flashes to specify MTD writesize
mtd: spi-nor: spansion: Set ECC block size
drivers/mtd/spi-nor/core.c | 4 +++-
drivers/mtd/spi-nor/core.h | 3 +++
drivers/mtd/spi-nor/spansion.c | 1 +
drivers/mtd/ubi/build.c | 4 +---
drivers/mtd/ubi/io.c | 9 ++++++++-
5 files changed, 16 insertions(+), 5 deletions(-)
---
2.28.0