mbox series

[GIT,PULL,5/7] Renesas RISC-V defconfig updates for v6.2

Message ID cover.1668788928.git.geert+renesas@glider.be
State New
Headers show
Series Renesas SoC updates for v6.2 (take two) | expand

Pull-request

git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git tags/renesas-riscv-defconfig-for-v6.2-tag1

Message

Geert Uytterhoeven Nov. 18, 2022, 4:45 p.m. UTC
The following changes since commit 9abf2313adc1ca1b6180c508c25f22f9395cc780:

  Linux 6.1-rc1 (2022-10-16 15:36:24 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git tags/renesas-riscv-defconfig-for-v6.2-tag1

for you to fetch changes up to 1776fca7fadbac2260a22e2ecb708e8a1ba9310d:

  riscv: configs: defconfig: Enable Renesas RZ/Five SoC (2022-11-10 16:37:58 +0100)

----------------------------------------------------------------
Renesas RISC-V defconfig updates for v6.2

  - Enable support for the Renesas RZ/Five SoC and the RZ/Five SMARC EVK
    board in the risc-v defconfig.

----------------------------------------------------------------
Lad Prabhakar (1):
      riscv: configs: defconfig: Enable Renesas RZ/Five SoC

 arch/riscv/configs/defconfig | 3 +++
 1 file changed, 3 insertions(+)