| Message ID | 20191104110856.GX24620@dragon |
|---|---|
| State | New |
| Headers | show |
| Series | [GIT,PULL] i.MX clock changes for 5.5 | expand |
Quoting Shawn Guo (2019-11-04 03:08:57) > The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c: > > Linux 5.4-rc1 (2019-09-30 10:35:40 -0700) > > are available in the Git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git tags/imx-clk-5.5 > > for you to fetch changes up to bceed71ba13116de4b1459c2c6db47d927b48e68: > > clk: imx: imx8mq: fix sys3_pll_out_sels (2019-11-04 09:10:49 +0800) > > ---------------------------------------------------------------- Thanks. Pulled into clk-next
The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c: Linux 5.4-rc1 (2019-09-30 10:35:40 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git tags/imx-clk-5.5 for you to fetch changes up to bceed71ba13116de4b1459c2c6db47d927b48e68: clk: imx: imx8mq: fix sys3_pll_out_sels (2019-11-04 09:10:49 +0800) ---------------------------------------------------------------- i.MX clock changes for 5.5: - Make 1443X/1416X PLL clock structure common for reusing among i.MX8 SoCs. - A couple of imx7ulp clock multiplexer option corrections. - Drop IMX7ULP_CLK_MIPI_PLL clock, as it's a MIPI DSI local clock and shouldn't be used externally. - Add VIDEO2_PLL clock for imx8mq which is needed by DCSS when high resolutions are used. - Add missing gate clock for pll1/2 fixed dividers on i.MX8 SoCs. - Register SYS_PLL1 and SYS_PLL2 as fixed clock rather than pll14xx type of clock. - Use imx_obtain_fixed_clk_hw() to simplify i.MX6/7/8 clock driver code a little bit. - One cosmetic change on clk-pll14xx code to make variables static. ---------------------------------------------------------------- Anson Huang (4): clk: imx8mm: Move 1443X/1416X PLL clock structure to common place clk: imx8mn: Use common 1443X/1416X PLL clock structure clk: imx7ulp: Correct system clock source option #7 clk: imx7ulp: Correct DDR clock mux options Fancy Fang (1): clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock Laurentiu Palcu (1): clk: imx8mq: Add VIDEO2_PLL clock Leonard Crestez (4): clk: imx: pll14xx: Fix quick switch of S/K parameter clk: imx8mq: Define gates for pll1/2 fixed dividers clk: imx8mm: Define gates for pll1/2 fixed dividers clk: imx8mn: Define gates for pll1/2 fixed dividers Peng Fan (8): clk: imx: imx8mm: mark sys_pll1/2 as fixed clock clk: imx: imx8mn: mark sys_pll1/2 as fixed clock clk: imx: imx8mq: mark sys1/2_pll as fixed clock clk: imx: imx7d: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx8mq: fix sys3_pll_out_sels YueHaibing (1): clk: imx: clk-pll14xx: Make two variables static .../devicetree/bindings/clock/imx7ulp-clock.txt | 1 - drivers/clk/imx/clk-imx6sll.c | 8 +- drivers/clk/imx/clk-imx6sx.c | 12 +- drivers/clk/imx/clk-imx6ul.c | 8 +- drivers/clk/imx/clk-imx7d.c | 4 +- drivers/clk/imx/clk-imx7ulp.c | 9 +- drivers/clk/imx/clk-imx8mm.c | 150 +++++++------------- drivers/clk/imx/clk-imx8mn.c | 152 +++++++-------------- drivers/clk/imx/clk-imx8mq.c | 77 +++++++---- drivers/clk/imx/clk-pll14xx.c | 72 +++++----- drivers/clk/imx/clk.h | 3 + include/dt-bindings/clock/imx7ulp-clock.h | 1 + include/dt-bindings/clock/imx8mm-clock.h | 19 ++- include/dt-bindings/clock/imx8mn-clock.h | 19 ++- include/dt-bindings/clock/imx8mq-clock.h | 24 +++- 15 files changed, 268 insertions(+), 291 deletions(-)