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dkim=pass header.i=@aosc.xyz X-Yandex-ForeignMX: US X-Yandex-Suid-Status: 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 1130000036118848 From: Icenowy Zheng To: Zhang Rui , Eduardo Valentin , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Ondrej Jirman Subject: [PATCH 1/3] dt-bindings: document the thermal sensor of Allwinner H3 SoC Date: Tue, 28 Feb 2017 03:40:52 +0800 Message-Id: <20170227194054.51951-1-icenowy@aosc.xyz> X-Mailer: git-send-email 2.11.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170227_114148_823884_880B4E2B X-CRM114-Status: GOOD ( 12.84 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2a02:6b8:0:f35:0:0:0:a4 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Icenowy Zheng , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org From: Ondrej Jirman This patch adds the binding documentation for the thermal sensor found in Allwinner H3 SoC. Signed-off-by: Ondřej Jirman [Icenowy: some adjustments to documentation and the commit message] Signed-off-by: Icenowy Zheng --- .../devicetree/bindings/thermal/sun8i-ths.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/sun8i-ths.txt diff --git a/Documentation/devicetree/bindings/thermal/sun8i-ths.txt b/Documentation/devicetree/bindings/thermal/sun8i-ths.txt new file mode 100644 index 000000000000..eec094c459b8 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/sun8i-ths.txt @@ -0,0 +1,35 @@ +* Thermal sensor for new Allwinner SoCs + +Required properties: +- compatible : Should be one of the following: + - "allwinner,sun8i-h3-ths" +- reg : Address range of the thermal sensor registers +- resets : Must contain phandles to reset controls matching the entries + of the names +- reset-names : Must include the name "ahb" +- clocks : Must contain phandles to clock controls matching the entries + of the names +- clock-names : Must contain "ahb" for the bus gate and "ths" for the THS + clock +- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. + +Optional properties: +- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If + unspecified default values shall be used. Refer to + Documentation/devicetree/bindings/nvmem/nvmem.txt to know how to + specify nvmem cells. +- nvmem-cell-names: Should be "cal" + +Example: +ths: ths@01c25000 { + compatible = "allwinner,sun8i-h3-ths"; + reg = <0x01c25000 0x400>; + interrupts = ; + resets = <&ccu RST_BUS_THS>; + reset-names = "ahb"; + clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; + clock-names = "ahb", "ths"; + nvmem-cells = <&ths_cal>; + nvmem-cell-names = "cal"; + #thermal-sensor-cells = <1>; +};