From patchwork Sat Sep 30 12:13:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 820208 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133; helo=bombadil.infradead.org; envelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Ds/paYib"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="V/cXeXcJ"; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y46m421xzz9t2Z for ; Sat, 30 Sep 2017 22:13:56 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=u7R+zp1180PA0fJ8oCcD2qCjVFN9NU4Pi9D6xTenofU=; b=Ds/ paYibKuHfks9aPsW8fRY3obMTlq9V38vyfvZs/pDfbytikylKbXkG5mE4Eb78gJobVv/Z/d9IIkCC 8ihavNYawavBo1z65G/tkUj6zGDicIeBYAt9dd0ncH1OWpvOp50pWgOYdujwDkr+u7z/21gNvX26M VqL5nLLfUaPTHAzlOWNBdCc7BhPXqhmrgomMckiZ0eD+KX0REezOw9c3hCnJ6cliQKi0APabyWsO0 5s0apzz0FeDMe3GDlwA+k4m1cRZDKGQl/CopO5f+93Q/zZ0a6JUjSdRFmpNXHbMnUwFexThws59/C epwMVA/t4+eCz4gbNdC2P1flAldhzdQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1dyGeW-0006nq-SO; Sat, 30 Sep 2017 12:13:52 +0000 Received: from mail-qt0-x244.google.com ([2607:f8b0:400d:c0d::244]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1dyGeS-0006he-Ux for linux-arm-kernel@lists.infradead.org; Sat, 30 Sep 2017 12:13:51 +0000 Received: by mail-qt0-x244.google.com with SMTP id 47so2509453qts.10 for ; Sat, 30 Sep 2017 05:13:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=gyKqflSzB+J0Uqbl1VwC0z231TwVs9+H70PzZEdnv4k=; b=V/cXeXcJA/xbjQc1wR7YA8zcQlvJpPFsXt58O8p0ADDoz7GAu4JI9plO+826IIQa5V VcdM6/8TOu/QDdeeJgg5rIxuWSmd6znvU++Nxtmas4ukLmavNV3FY6zTsChjAvEcziA2 b/IGgp9fEIbBxVxywj4j/mQCxPmg+6DuBDGooc7772pTvuTBCU94N4vjDCa8MeL9Hz5d 2LYbEoHaI6s1Dwd3ppNs44HwSIPYxOor/Yjk/1pneKzERrLgm7wlPtQvvB6sY5udli5U KSqC679ZUHjtsNPDowvmA0Q3QUFGGzN/Ys8807S91ZdE6tjIWN8Ew2Und8NXzhrHHHr9 w2yA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=gyKqflSzB+J0Uqbl1VwC0z231TwVs9+H70PzZEdnv4k=; b=nUJScUIaQv1JC6oy0TwxJ7OyPygpPUMFs4GwlcwIkOI/KXwCH3S5URy6GXYRWLYt9l ZY1rrRV1hBVB87Ug4AgCX0gCMKdPUOHm31cg64YbM97xF4eJ1lb/nkaPvjSqA1EZounS I+c7+FdlX/8kU3D+f/2ZVdtA4aCpF6RW4YPxaKLvqgw23xdYaDBtvDBjdS6F+2zl5J1g 98mGPXiaC84nqd8zYWmoF5E4VLIS1TAdwbzIrIWdPOnhALzaVCJ6C1NeuuaJK3zCW2dI i2sgTu7z8qDGsPI4wUt54GR/0xrJlQLWhxJDLZcbsiavbcLz1uJjgUomyj5G4CZaEQeP zbQg== X-Gm-Message-State: AMCzsaVpbZ7TAoEH2nlckSqsEVC/7Dh9kZoTGUgJ9fqAfInegW0xLSY7 ceOofV2fzjIVZpiN9FeCBhg= X-Google-Smtp-Source: AOwi7QB78ID1am4kN9283tGFu0QHGDZcKagsdy93Af9o2LMFnoaoXu2Q+C7OyMuUDBkPqYWRNzHfBg== X-Received: by 10.237.37.231 with SMTP id y36mr10429353qtc.199.1506773607540; Sat, 30 Sep 2017 05:13:27 -0700 (PDT) Received: from localhost.localdomain ([187.180.181.115]) by smtp.gmail.com with ESMTPSA id 16sm3954766qkd.30.2017.09.30.05.13.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 30 Sep 2017 05:13:27 -0700 (PDT) From: Fabio Estevam To: vireshk@kernel.org Subject: [PATCH v2] cpufreq: imx6q: Move speed grading check to cpufreq driver Date: Sat, 30 Sep 2017 09:13:01 -0300 Message-Id: <1506773581-1226-1-git-send-email-festevam@gmail.com> X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170930_051349_082402_386CAC7C X-CRM114-Status: GOOD ( 21.46 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [2607:f8b0:400d:c0d:0:0:0:244 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (festevam[at]gmail.com) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nm@ti.com, anson.huang@nxp.com, linux-pm@vger.kernel.org, sboyd@codeaurora.org, rjw@rjwysocki.net, kernel@pengutronix.de, Fabio Estevam , shawnguo@kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org From: Fabio Estevam On some i.MX6 SoCs (like i.MX6UL, i.MX6SX and i.MX6UL) that do not have speed grading check, opp table will not be created in platform code, so cpufreq driver prints the following error message: cpu cpu0: dev_pm_opp_get_opp_count: OPP table not found (-19) However, this is not really an error in this case because the imx6q-cpufreq driver first calls dev_pm_opp_get_opp_count() and if it fails, it means that platform code does not provide OPP and then dev_pm_opp_of_add_table() will be called. In order to avoid such confusing error message, move the speed grading check from platform code to the imx6q-cpufreq driver. This way the imx6q-cpufreq no longer has to check whether OPP table is supplied by platform code. Tested on a i.MX6Q and i.MX6UL based boards. Signed-off-by: Fabio Estevam --- Previous discussion on this topic: https://patchwork.kernel.org/patch/9295059/ Changes since v1: - Remove unneeded has_speed_grading() function. arch/arm/mach-imx/mach-imx6q.c | 88 +---------------------------------------- drivers/cpufreq/imx6q-cpufreq.c | 85 +++++++++++++++++++++++++++++---------- 2 files changed, 67 insertions(+), 106 deletions(-) diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 45801b2..b5f89fd 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -286,88 +286,6 @@ static void __init imx6q_init_machine(void) imx6q_axi_init(); } -#define OCOTP_CFG3 0x440 -#define OCOTP_CFG3_SPEED_SHIFT 16 -#define OCOTP_CFG3_SPEED_1P2GHZ 0x3 -#define OCOTP_CFG3_SPEED_996MHZ 0x2 -#define OCOTP_CFG3_SPEED_852MHZ 0x1 - -static void __init imx6q_opp_check_speed_grading(struct device *cpu_dev) -{ - struct device_node *np; - void __iomem *base; - u32 val; - - np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-ocotp"); - if (!np) { - pr_warn("failed to find ocotp node\n"); - return; - } - - base = of_iomap(np, 0); - if (!base) { - pr_warn("failed to map ocotp\n"); - goto put_node; - } - - /* - * SPEED_GRADING[1:0] defines the max speed of ARM: - * 2b'11: 1200000000Hz; - * 2b'10: 996000000Hz; - * 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz. - * 2b'00: 792000000Hz; - * We need to set the max speed of ARM according to fuse map. - */ - val = readl_relaxed(base + OCOTP_CFG3); - val >>= OCOTP_CFG3_SPEED_SHIFT; - val &= 0x3; - - if ((val != OCOTP_CFG3_SPEED_1P2GHZ) && cpu_is_imx6q()) - if (dev_pm_opp_disable(cpu_dev, 1200000000)) - pr_warn("failed to disable 1.2 GHz OPP\n"); - if (val < OCOTP_CFG3_SPEED_996MHZ) - if (dev_pm_opp_disable(cpu_dev, 996000000)) - pr_warn("failed to disable 996 MHz OPP\n"); - if (cpu_is_imx6q()) { - if (val != OCOTP_CFG3_SPEED_852MHZ) - if (dev_pm_opp_disable(cpu_dev, 852000000)) - pr_warn("failed to disable 852 MHz OPP\n"); - } - iounmap(base); -put_node: - of_node_put(np); -} - -static void __init imx6q_opp_init(void) -{ - struct device_node *np; - struct device *cpu_dev = get_cpu_device(0); - - if (!cpu_dev) { - pr_warn("failed to get cpu0 device\n"); - return; - } - np = of_node_get(cpu_dev->of_node); - if (!np) { - pr_warn("failed to find cpu0 node\n"); - return; - } - - if (dev_pm_opp_of_add_table(cpu_dev)) { - pr_warn("failed to init OPP table\n"); - goto put_node; - } - - imx6q_opp_check_speed_grading(cpu_dev); - -put_node: - of_node_put(np); -} - -static struct platform_device imx6q_cpufreq_pdev = { - .name = "imx6q-cpufreq", -}; - static void __init imx6q_init_late(void) { /* @@ -377,10 +295,8 @@ static void __init imx6q_init_late(void) if (imx_get_soc_revision() > IMX_CHIP_REVISION_1_1) imx6q_cpuidle_init(); - if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) { - imx6q_opp_init(); - platform_device_register(&imx6q_cpufreq_pdev); - } + if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) + platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); } static void __init imx6q_map_io(void) diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c index 14466a9..45d90e6 100644 --- a/drivers/cpufreq/imx6q-cpufreq.c +++ b/drivers/cpufreq/imx6q-cpufreq.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -191,6 +192,57 @@ static struct cpufreq_driver imx6q_cpufreq_driver = { .suspend = cpufreq_generic_suspend, }; +#define OCOTP_CFG3 0x440 +#define OCOTP_CFG3_SPEED_SHIFT 16 +#define OCOTP_CFG3_SPEED_1P2GHZ 0x3 +#define OCOTP_CFG3_SPEED_996MHZ 0x2 +#define OCOTP_CFG3_SPEED_852MHZ 0x1 + +static void __init imx6q_opp_check_speed_grading(struct device *dev) +{ + struct device_node *np; + void __iomem *base; + u32 val; + + np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-ocotp"); + if (!np) + return; + + base = of_iomap(np, 0); + if (!base) { + dev_err(dev, "failed to map ocotp\n"); + goto put_node; + } + + /* + * SPEED_GRADING[1:0] defines the max speed of ARM: + * 2b'11: 1200000000Hz; + * 2b'10: 996000000Hz; + * 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz. + * 2b'00: 792000000Hz; + * We need to set the max speed of ARM according to fuse map. + */ + val = readl_relaxed(base + OCOTP_CFG3); + val >>= OCOTP_CFG3_SPEED_SHIFT; + val &= 0x3; + + if ((val != OCOTP_CFG3_SPEED_1P2GHZ) && + of_machine_is_compatible("fsl,imx6q")) + if (dev_pm_opp_disable(dev, 1200000000)) + dev_warn(dev, "failed to disable 1.2GHz OPP\n"); + if (val < OCOTP_CFG3_SPEED_996MHZ) + if (dev_pm_opp_disable(dev, 996000000)) + dev_warn(dev, "failed to disable 996MHz OPP\n"); + if (of_machine_is_compatible("fsl,imx6q")) { + if (val != OCOTP_CFG3_SPEED_852MHZ) + if (dev_pm_opp_disable(dev, 852000000)) + dev_warn(dev, "failed to disable 852MHz OPP\n"); + } + iounmap(base); +put_node: + of_node_put(np); +} + static int imx6q_cpufreq_probe(struct platform_device *pdev) { struct device_node *np; @@ -252,28 +304,21 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev) goto put_reg; } - /* - * We expect an OPP table supplied by platform. - * Just, incase the platform did not supply the OPP - * table, it will try to get it. - */ - num = dev_pm_opp_get_opp_count(cpu_dev); - if (num < 0) { - ret = dev_pm_opp_of_add_table(cpu_dev); - if (ret < 0) { - dev_err(cpu_dev, "failed to init OPP table: %d\n", ret); - goto put_reg; - } + ret = dev_pm_opp_of_add_table(cpu_dev); + if (ret < 0) { + dev_err(cpu_dev, "failed to init OPP table: %d\n", ret); + goto put_reg; + } - /* Because we have added the OPPs here, we must free them */ - free_opp = true; + imx6q_opp_check_speed_grading(cpu_dev); - num = dev_pm_opp_get_opp_count(cpu_dev); - if (num < 0) { - ret = num; - dev_err(cpu_dev, "no OPP table is found: %d\n", ret); - goto out_free_opp; - } + /* Because we have added the OPPs here, we must free them */ + free_opp = true; + num = dev_pm_opp_get_opp_count(cpu_dev); + if (num < 0) { + ret = num; + dev_err(cpu_dev, "no OPP table is found: %d\n", ret); + goto out_free_opp; } ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);