Message ID | 1426754530-3137-1-git-send-email-s.hauer@pengutronix.de |
---|---|
State | New |
Headers | show |
Hello, On Thu, Mar 19, 2015 at 09:42:05AM +0100, Sascha Hauer wrote: > The clk functions and structs declare the parent_name arrays as > 'const char **parent_names' which means the parent name strings > are const, but the array itself is not. Use > 'const char * const * parent_names' instead which also makes > the array const. This allows us to put the parent_name arrays into > the __initconst section. > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> looks sensible: Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> It would be nice to have this for more clock types (which of course shouldn't delay this patch). Best regards Uwe
Mike, Stephen, Any chance to get this forward please? Sascha On Thu, Mar 19, 2015 at 09:42:04AM +0100, Sascha Hauer wrote: > > The following changes since commit 9eccca0843205f87c00404b663188b88eb248051: > > Linux 4.0-rc3 (2015-03-08 16:09:09 -0700) > > are available in the git repository at: > > git://git.pengutronix.de/git/imx/linux-2.6.git tags/v4.0-clk-mediatek-v8 > > for you to fetch changes up to 54449c74078c9d93619757c7a91b820eaa28c0f4: > > dt-bindings: ARM: Mediatek: Document devicetree bindings for clock/reset controllers (2015-03-19 09:15:33 +0100) > > ---------------------------------------------------------------- > This patchset contains the initial common clock support for Mediatek SoCs. > Mediatek SoC's clock architecture comprises of various PLLs, dividers, muxes > and clock gates. > > Changes in v8: > - add patch to allow to put parent_name arrays in __initconst > - put parent_name arrays into __initconst > > Changes in v7: > - fix duplicate definition/declaration of mtk_register_reset_controller > - fix pd_reg offset of tvdpll > - make clk initialization arrays const > > Changes in v6: > - rework PLL support, only a fraction of original size now > - Move binding docs to Documentation/devicetree/bindings/arm/mediatek since > the units are not really clock specific (they contain reset controllers) > > Changes in v5: > - Add reset controller support for pericfg/infracfg > - Use regmap for the gates > - remove now unnecessary spinlock for the gates > - Add PMIC wrapper support as of v3 > > Changes in v4: > - Support MT8173 platform. > - Re-ordered patchset. driver/clk/Makefile in 2nd patch. > - Extract the common part definition(mtk_gate/mtk_pll/mtk_mux) from > clk-mt8135.c/clk-mt8173.c to clk-mtk.c. > - Refine code. Rmove unnessacary debug information and unsed defines, > add prefix "mtk_" for static functions. > - Remove flag CLK_IGNORE_UNUSED and set flag CLK_SET_RATE_PARENT on > gate/mux/fixed-factor. > - Use spin_lock_irqsave(&clk_ops_lock, flags) instead of mtk_clk_lock. > - Example above include a node for the clock controller itself, followed > by the i2c controller example above. > > Changes in v3: > - Rebase to 3.19-rc1. > - Refine code. Remove unneed functions, debug logs and comments, and fine tune > error logs. > > Changes in v2: > - Re-ordered patchset. Fold include/dt-bindings and DT document in 1st patch. > > ---------------------------------------------------------------- > James Liao (3): > clk: mediatek: Add initial common clock support for Mediatek SoCs. > clk: mediatek: Add basic clocks for Mediatek MT8135. > clk: mediatek: Add basic clocks for Mediatek MT8173. > > Sascha Hauer (3): > clk: make strings in parent name arrays const > clk: mediatek: Add reset controller support > dt-bindings: ARM: Mediatek: Document devicetree bindings for clock/reset controllers > > .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 23 + > .../bindings/arm/mediatek/mediatek,infracfg.txt | 30 + > .../bindings/arm/mediatek/mediatek,pericfg.txt | 30 + > .../bindings/arm/mediatek/mediatek,topckgen.txt | 23 + > drivers/clk/Makefile | 1 + > drivers/clk/clk-composite.c | 2 +- > drivers/clk/clk-mux.c | 4 +- > drivers/clk/mediatek/Makefile | 4 + > drivers/clk/mediatek/clk-gate.c | 137 ++++ > drivers/clk/mediatek/clk-gate.h | 49 ++ > drivers/clk/mediatek/clk-mt8135.c | 640 ++++++++++++++++ > drivers/clk/mediatek/clk-mt8173.c | 826 +++++++++++++++++++++ > drivers/clk/mediatek/clk-mtk.c | 197 +++++ > drivers/clk/mediatek/clk-mtk.h | 165 ++++ > drivers/clk/mediatek/clk-pll.c | 325 ++++++++ > drivers/clk/mediatek/reset.c | 99 +++ > include/dt-bindings/clock/mt8135-clk.h | 190 +++++ > include/dt-bindings/clock/mt8173-clk.h | 231 ++++++ > .../dt-bindings/reset-controller/mt8135-resets.h | 64 ++ > .../dt-bindings/reset-controller/mt8173-resets.h | 63 ++ > include/linux/clk-provider.h | 8 +- > 21 files changed, 3104 insertions(+), 7 deletions(-) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > create mode 100644 drivers/clk/mediatek/Makefile > create mode 100644 drivers/clk/mediatek/clk-gate.c > create mode 100644 drivers/clk/mediatek/clk-gate.h > create mode 100644 drivers/clk/mediatek/clk-mt8135.c > create mode 100644 drivers/clk/mediatek/clk-mt8173.c > create mode 100644 drivers/clk/mediatek/clk-mtk.c > create mode 100644 drivers/clk/mediatek/clk-mtk.h > create mode 100644 drivers/clk/mediatek/clk-pll.c > create mode 100644 drivers/clk/mediatek/reset.c > create mode 100644 include/dt-bindings/clock/mt8135-clk.h > create mode 100644 include/dt-bindings/clock/mt8173-clk.h > create mode 100644 include/dt-bindings/reset-controller/mt8135-resets.h > create mode 100644 include/dt-bindings/reset-controller/mt8173-resets.h > >
On 03/19, Sascha Hauer wrote: > diff --git a/drivers/clk/mediatek/clk-mt8135.c b/drivers/clk/mediatek/clk-mt8135.c > new file mode 100644 > index 0000000..a22f6fa > --- /dev/null > +++ b/drivers/clk/mediatek/clk-mt8135.c > @@ -0,0 +1,640 @@ > +/* > + * Copyright (c) 2014 MediaTek Inc. > + * Author: James Liao <jamesjj.liao@mediatek.com> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#include <linux/of.h> > +#include <linux/of_address.h> > +#include <linux/slab.h> > +#include <linux/mfd/syscon.h> > +#include <dt-bindings/clock/mt8135-clk.h> > + > +#include "clk-mtk.h" > +#include "clk-gate.h" > + > +static DEFINE_SPINLOCK(lock); Nitpick: 'lock' is very generic. Lockdep will use the variable name in its output, so it's wise to make locks have better names if possible. How about mt8135_lock?
On 03/27, Sascha Hauer wrote: > Mike, Stephen, > > Any chance to get this forward please? > Looks ok to me except for the minor nitpick on lock names.
On Fri, Mar 27, 2015 at 12:39:50AM -0700, Stephen Boyd wrote: > On 03/19, Sascha Hauer wrote: > > diff --git a/drivers/clk/mediatek/clk-mt8135.c b/drivers/clk/mediatek/clk-mt8135.c > > new file mode 100644 > > index 0000000..a22f6fa > > --- /dev/null > > +++ b/drivers/clk/mediatek/clk-mt8135.c > > @@ -0,0 +1,640 @@ > > +/* > > + * Copyright (c) 2014 MediaTek Inc. > > + * Author: James Liao <jamesjj.liao@mediatek.com> > > + * > > + * This program is free software; you can redistribute it and/or modify > > + * it under the terms of the GNU General Public License version 2 as > > + * published by the Free Software Foundation. > > + * > > + * This program is distributed in the hope that it will be useful, > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > + * GNU General Public License for more details. > > + */ > > + > > +#include <linux/of.h> > > +#include <linux/of_address.h> > > +#include <linux/slab.h> > > +#include <linux/mfd/syscon.h> > > +#include <dt-bindings/clock/mt8135-clk.h> > > + > > +#include "clk-mtk.h" > > +#include "clk-gate.h" > > + > > +static DEFINE_SPINLOCK(lock); > > Nitpick: 'lock' is very generic. Lockdep will use the variable > name in its output, so it's wise to make locks have better names > if possible. How about mt8135_lock? I just renamed this to mt8135_clk_lock/mt8173_clk_lock and resent the series. Sascha
On 19/03/15 09:42, Sascha Hauer wrote: > The pericfg and infracfg units also provide reset lines to several > other SoC internal units. Add support for the reset controller. This messages is a bit confusing, could you explain better what the patch does and how this interacts with pericfg and infracfg? > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > --- > drivers/clk/mediatek/Makefile | 1 + > drivers/clk/mediatek/clk-mtk.h | 10 +++++ > drivers/clk/mediatek/reset.c | 99 ++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 110 insertions(+) > create mode 100644 drivers/clk/mediatek/reset.c > > diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile > index c384e97..0b6f1c3 100644 > --- a/drivers/clk/mediatek/Makefile > +++ b/drivers/clk/mediatek/Makefile > @@ -1 +1,2 @@ > obj-y += clk-mtk.o clk-pll.o clk-gate.o > +obj-$(CONFIG_RESET_CONTROLLER) += reset.o > diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h > index 5aaba81..5a6b5dd 100644 > --- a/drivers/clk/mediatek/clk-mtk.h > +++ b/drivers/clk/mediatek/clk-mtk.h > @@ -152,4 +152,14 @@ void __init mtk_clk_register_plls(struct device_node *node, > const struct mtk_pll_data *plls, int num_plls, > struct clk_onecell_data *clk_data); > > +#ifdef CONFIG_RESET_CONTROLLER > +void mtk_register_reset_controller(struct device_node *np, > + unsigned int num_regs, int regofs); > +#else > +static inline void mtk_register_reset_controller(struct device_node *np, > + unsigned int num_regs, int regofs) > +{ > +} > +#endif > + > #endif /* __DRV_CLK_MTK_H */ > diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c > new file mode 100644 > index 0000000..3a85a53 > --- /dev/null > +++ b/drivers/clk/mediatek/reset.c > @@ -0,0 +1,99 @@ > +/* > + * Copyright (c) 2014 MediaTek Inc. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt Do we need this? Cheers, Matthias
On 19/03/15 09:42, Sascha Hauer wrote: > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> The patch should have a text as description. Thanks, Matthias > --- > .../bindings/arm/mediatek/mediatek,apmixedsys.txt | 23 +++++++++++++++++ > .../bindings/arm/mediatek/mediatek,infracfg.txt | 30 ++++++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,pericfg.txt | 30 ++++++++++++++++++++++ > .../bindings/arm/mediatek/mediatek,topckgen.txt | 23 +++++++++++++++++ > 4 files changed, 106 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > new file mode 100644 > index 0000000..5af6d73 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt > @@ -0,0 +1,23 @@ > +Mediatek apmixedsys controller > +============================== > + > +The Mediatek apmixedsys controller provides the PLLs to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-apmixedsys" > + - "mediatek,mt8173-apmixedsys" > +- #clock-cells: Must be 1 > + > +The apmixedsys controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > + > +Example: > + > +apmixedsys: apmixedsys@10209000 { > + compatible = "mediatek,mt8173-apmixedsys"; > + reg = <0 0x10209000 0 0x1000>; > + #clock-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > new file mode 100644 > index 0000000..684da473 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt > @@ -0,0 +1,30 @@ > +Mediatek infracfg controller > +============================ > + > +The Mediatek infracfg controller provides various clocks and reset > +outputs to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-infracfg", "syscon" > + - "mediatek,mt8173-infracfg", "syscon" > +- #clock-cells: Must be 1 > +- #reset-cells: Must be 1 > + > +The infracfg controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > +Also it uses the common reset controller binding from > +Documentation/devicetree/bindings/reset/reset.txt. > +The available reset outputs are defined in > +dt-bindings/reset-controller/mt*-resets.h > + > +Example: > + > +infracfg: infracfg@10001000 { > + compatible = "mediatek,mt8173-infracfg", "syscon"; > + reg = <0 0x10001000 0 0x1000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt > new file mode 100644 > index 0000000..fdb45c6 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt > @@ -0,0 +1,30 @@ > +Mediatek pericfg controller > +=========================== > + > +The Mediatek pericfg controller provides various clocks and reset > +outputs to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-pericfg", "syscon" > + - "mediatek,mt8173-pericfg", "syscon" > +- #clock-cells: Must be 1 > +- #reset-cells: Must be 1 > + > +The pericfg controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > +Also it uses the common reset controller binding from > +Documentation/devicetree/bindings/reset/reset.txt. > +The available reset outputs are defined in > +dt-bindings/reset-controller/mt*-resets.h > + > +Example: > + > +pericfg: pericfg@10003000 { > + compatible = "mediatek,mt8173-pericfg", "syscon"; > + reg = <0 0x10003000 0 0x1000>; > + #clock-cells = <1>; > + #reset-cells = <1>; > +}; > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > new file mode 100644 > index 0000000..a425248 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt > @@ -0,0 +1,23 @@ > +Mediatek topckgen controller > +============================ > + > +The Mediatek topckgen controller provides various clocks to the system. > + > +Required Properties: > + > +- compatible: Should be: > + - "mediatek,mt8135-topckgen" > + - "mediatek,mt8173-topckgen" > +- #clock-cells: Must be 1 > + > +The topckgen controller uses the common clk binding from > +Documentation/devicetree/bindings/clock/clock-bindings.txt > +The available clocks are defined in dt-bindings/clock/mt*-clk.h. > + > +Example: > + > +topckgen: topckgen@10000000 { > + compatible = "mediatek,mt8173-topckgen"; > + reg = <0 0x10000000 0 0x1000>; > + #clock-cells = <1>; > +}; >