From patchwork Tue Oct 21 09:22:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sebastian Hesselbarth X-Patchwork-Id: 401401 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2001:1868:205::9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 04E41140077 for ; Tue, 21 Oct 2014 20:26:32 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XgVg3-0006hV-1O; Tue, 21 Oct 2014 09:24:27 +0000 Received: from mail-wi0-x22f.google.com ([2a00:1450:400c:c05::22f]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XgVew-0005j7-Q6 for linux-arm-kernel@lists.infradead.org; Tue, 21 Oct 2014 09:23:19 +0000 Received: by mail-wi0-f175.google.com with SMTP id d1so9453479wiv.8 for ; Tue, 21 Oct 2014 02:22:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :content-type:content-transfer-encoding; bh=Wqw9OUlkTWFBTfbOcRBnSzwcZQIfujVhqXxpehUnwc0=; b=grBOj5VnN0FDDXBWnTTiHGhnXfZdX3K9PibweVIHXXZrKABxAqXFCtekX9spdHnarE yZCF/EGlZED3RVYDu+t8QceK8ltDNSVFyRuLUB8m3wTfAQRE57+NrGfiq3p0SDLeczUo OV2FOaxOw/GPwFPQXN4W2USXnqjfDLHs6WLGKJKQVvc2BFSYtqcocPATxTiY8t7xf+sV wl0B90g0WmuZ899C3HNamohSuOH1oNkydl8LT0qVARiHdi45Wd7rb54RtJk19630VS1R 3EE6RFA79bbVnlLWDAKFP4tK1k1s0BWw+p4wdTmFXVZqaYKdCsOevyFxJXSUCSOzPV58 fPEw== X-Received: by 10.194.119.72 with SMTP id ks8mr39520149wjb.75.1413883374693; Tue, 21 Oct 2014 02:22:54 -0700 (PDT) Received: from topkick.lan (f052063137.adsl.alicedsl.de. [78.52.63.137]) by mx.google.com with ESMTPSA id bg10sm14702074wjc.47.2014.10.21.02.22.52 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 21 Oct 2014 02:22:53 -0700 (PDT) From: Sebastian Hesselbarth To: Sebastian Hesselbarth Subject: [PATCH RESEND 09/12] mmc: sdhci-pxav3: Document clocks and additional clock-names property Date: Tue, 21 Oct 2014 11:22:41 +0200 Message-Id: <1413883364-681-10-git-send-email-sebastian.hesselbarth@gmail.com> In-Reply-To: <1413883364-681-1-git-send-email-sebastian.hesselbarth@gmail.com> References: <1413883364-681-1-git-send-email-sebastian.hesselbarth@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141021_022319_004295_6414F6DC X-CRM114-Status: GOOD ( 10.49 ) X-Spam-Score: -0.1 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (sebastian.hesselbarth[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain Cc: devicetree@vger.kernel.org, Ulf Hansson , =?UTF-8?q?Antoine=20T=C3=A9nart?= , linux-mmc@vger.kernel.org, Chris Ball , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Now that sdhci-pxav3 driver allows to have more than one IP clock defined, document both clocks and clock-names properties. Signed-off-by: Sebastian Hesselbarth --- Cc: Chris Ball Cc: Ulf Hansson Cc: "Antoine Ténart" Cc: linux-mmc@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- Documentation/devicetree/bindings/mmc/sdhci-pxa.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt b/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt index 86223c3eda90..4dd6deb90719 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.txt @@ -12,6 +12,10 @@ Required properties: * for "marvell,armada-380-sdhci", two register areas. The first one for the SDHCI registers themselves, and the second one for the AXI/Mbus bridge registers of the SDHCI unit. +- clocks: Array of clocks required for SDHCI; requires at least one for + I/O clock. +- clock-names: Array of names corresponding to clocks property; shall be + "io" for I/O clock and "core" for optional core clock. Optional properties: - mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning. @@ -23,6 +27,8 @@ sdhci@d4280800 { reg = <0xd4280800 0x800>; bus-width = <8>; interrupts = <27>; + clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>; + clock-names = "io", "core"; non-removable; mrvl,clk-delay-cycles = <31>; }; @@ -32,5 +38,6 @@ sdhci@d8000 { reg = <0xd8000 0x1000>, <0xdc000 0x100>; interrupts = <0 25 0x4>; clocks = <&gateclk 17>; + clock-names = "io"; mrvl,clk-delay-cycles = <0x1F>; };