From patchwork Tue Aug 26 08:58:22 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 383017 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2001:1868:205::9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 0E0231400DD for ; Tue, 26 Aug 2014 19:01:15 +1000 (EST) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XMCaw-0006VW-DP; Tue, 26 Aug 2014 08:59:14 +0000 Received: from mail-bl2lp0204.outbound.protection.outlook.com ([207.46.163.204] helo=na01-bl2-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XMCar-0006H3-RY for linux-arm-kernel@lists.infradead.org; Tue, 26 Aug 2014 08:59:11 +0000 Received: from BY2PR03MB347.namprd03.prod.outlook.com (10.141.139.16) by BY2PR03MB489.namprd03.prod.outlook.com (10.141.142.14) with Microsoft SMTP Server (TLS) id 15.0.1015.19; Tue, 26 Aug 2014 08:58:46 +0000 Received: from CH1PR03CA005.namprd03.prod.outlook.com (10.255.156.150) by BY2PR03MB347.namprd03.prod.outlook.com (10.141.139.16) with Microsoft SMTP Server (TLS) id 15.0.1015.9; Tue, 26 Aug 2014 08:58:44 +0000 Received: from BN1BFFO11FD041.protection.gbl (10.255.156.132) by CH1PR03CA005.outlook.office365.com (10.255.156.150) with Microsoft SMTP Server (TLS) id 15.0.1015.19 via Frontend Transport; Tue, 26 Aug 2014 08:58:43 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BN1BFFO11FD041.mail.protection.outlook.com (10.58.144.104) with Microsoft SMTP Server (TLS) id 15.0.1010.11 via Frontend Transport; Tue, 26 Aug 2014 08:58:43 +0000 Received: from dragon.ap.freescale.net ([10.192.185.230]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s7Q8wbrf027155; Tue, 26 Aug 2014 01:58:40 -0700 From: Shawn Guo To: Subject: [PATCH 2/2] ARM: imx: add lvds1_in and lvds2_in clocks Date: Tue, 26 Aug 2014 16:58:22 +0800 Message-ID: <1409043502-29081-2-git-send-email-shawn.guo@freescale.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1409043502-29081-1-git-send-email-shawn.guo@freescale.com> References: <1409043502-29081-1-git-send-email-shawn.guo@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(189002)(199003)(97736001)(74662001)(229853001)(76176999)(79102001)(106466001)(31966008)(21056001)(87286001)(26826002)(50986999)(87936001)(20776003)(110136001)(69596002)(19580395003)(83322001)(76482001)(104166001)(81342001)(4396001)(46102001)(102836001)(62966002)(50466002)(88136002)(47776003)(2351001)(6806004)(99396002)(84676001)(68736004)(74502001)(95666004)(19580405001)(33646002)(105606002)(85306004)(64706001)(86362001)(48376002)(77156001)(93916002)(92566001)(89996001)(92726001)(104016003)(81156004)(107046002)(80022001)(77982001)(44976005)(81542001)(85852003)(83072002)(90102001)(36756003)(50226001); DIR:OUT; SFP:; SCL:1; SRVR:BY2PR03MB347; H:az84smr01.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;UriScan:;UriScan:; X-Forefront-PRVS: 03152A99FF Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=Shawn.Guo@freescale.com; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:; X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140826_015910_110820_252D21C7 X-CRM114-Status: UNSURE ( 9.52 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [207.46.163.204 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [207.46.163.204 listed in wl.mailspike.net] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record Cc: Shengjiu Wang , Shawn Guo , kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org The lvds_in clocks are coming from external clock source via pad ANACLK. Since lvds_in and lvds_gate clocks cannot be enabled simultaneously, we need to call imx_clk_gate_exclusive() to register these clocks. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/clk-imx6q.c | 10 ++++++++-- include/dt-bindings/clock/imx6qdl-clock.h | 6 +++++- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 2edcebf67cee..e6c60188ec14 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -119,6 +119,9 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[IMX6QDL_CLK_CKIL] = imx_obtain_fixed_clock("ckil", 0); clk[IMX6QDL_CLK_CKIH] = imx_obtain_fixed_clock("ckih1", 0); clk[IMX6QDL_CLK_OSC] = imx_obtain_fixed_clock("osc", 0); + /* Clock source from external clock via ANACLK1/2 PADs */ + clk[IMX6QDL_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0); + clk[IMX6QDL_CLK_ANACLK2] = imx_obtain_fixed_clock("anaclk2", 0); np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); base = of_iomap(np, 0); @@ -176,8 +179,11 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) * the "output_enable" bit as a gate, even though it's really just * enabling clock output. */ - clk[IMX6QDL_CLK_LVDS1_GATE] = imx_clk_gate("lvds1_gate", "lvds1_sel", base + 0x160, 10); - clk[IMX6QDL_CLK_LVDS2_GATE] = imx_clk_gate("lvds2_gate", "lvds2_sel", base + 0x160, 11); + clk[IMX6QDL_CLK_LVDS1_GATE] = imx_clk_gate_exclusive("lvds1_gate", "lvds1_sel", base + 0x160, 10, BIT(12)); + clk[IMX6QDL_CLK_LVDS2_GATE] = imx_clk_gate_exclusive("lvds2_gate", "lvds2_sel", base + 0x160, 11, BIT(13)); + + clk[IMX6QDL_CLK_LVDS1_IN] = imx_clk_gate_exclusive("lvds1_in", "anaclk1", base + 0x160, 12, BIT(10)); + clk[IMX6QDL_CLK_LVDS2_IN] = imx_clk_gate_exclusive("lvds2_in", "anaclk2", base + 0x160, 13, BIT(11)); /* name parent_name reg idx */ clk[IMX6QDL_CLK_PLL2_PFD0_352M] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0); diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h index 323e8650f198..e992ce5e05a5 100644 --- a/include/dt-bindings/clock/imx6qdl-clock.h +++ b/include/dt-bindings/clock/imx6qdl-clock.h @@ -220,6 +220,10 @@ #define IMX6QDL_CLK_LVDS2_GATE 207 #define IMX6QDL_CLK_ESAI_IPG 208 #define IMX6QDL_CLK_ESAI_MEM 209 -#define IMX6QDL_CLK_END 210 +#define IMX6QDL_CLK_LVDS1_IN 210 +#define IMX6QDL_CLK_LVDS2_IN 211 +#define IMX6QDL_CLK_ANACLK1 212 +#define IMX6QDL_CLK_ANACLK2 213 +#define IMX6QDL_CLK_END 214 #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */