From patchwork Tue Nov 5 09:03:19 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 288447 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:770:15f::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8356B2C019C for ; Tue, 5 Nov 2013 20:04:03 +1100 (EST) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VdcYF-0001r7-Et; Tue, 05 Nov 2013 09:03:55 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VdcYD-0003LF-0H; Tue, 05 Nov 2013 09:03:53 +0000 Received: from metis.ext.pengutronix.de ([2001:6f8:1178:4:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VdcY9-0003K5-65 for linux-arm-kernel@lists.infradead.org; Tue, 05 Nov 2013 09:03:50 +0000 Received: from dude.hi.pengutronix.de ([2001:6f8:1178:2:21e:67ff:fe11:9c5c]) by metis.ext.pengutronix.de with esmtp (Exim 4.72) (envelope-from ) id 1VdcXi-0002gt-KJ; Tue, 05 Nov 2013 10:03:22 +0100 Received: from ukl by dude.hi.pengutronix.de with local (Exim 4.80) (envelope-from ) id 1VdcXi-0004nZ-Bj; Tue, 05 Nov 2013 10:03:22 +0100 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= To: Linus Walleij Subject: [PATCH] ARM: u300: fix timekeeping when periodic mode is used Date: Tue, 5 Nov 2013 10:03:19 +0100 Message-Id: <1383642199-11473-1-git-send-email-u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 1.8.4.rc3 In-Reply-To: <20131105083336.GK14892@pengutronix.de> References: <20131105083336.GK14892@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:6f8:1178:2:21e:67ff:fe11:9c5c X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131105_040349_601574_B033C6D8 X-CRM114-Status: GOOD ( 19.35 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org To determine the value to write to the hardware's timer counter register the symbol CLOCK_TICK_RATE is used. This value is a dummy value on u300 though. So instead use the clock rate that is used for oneshot mode. Signed-off-by: Uwe Kleine-König --- arch/arm/mach-u300/timer.c | 38 ++++++++++++++++++++++++-------------- 1 file changed, 24 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c index 9a5f9fb..5226162 100644 --- a/arch/arm/mach-u300/timer.c +++ b/arch/arm/mach-u300/timer.c @@ -184,11 +184,13 @@ #define U300_TIMER_APP_CRC (0x100) #define U300_TIMER_APP_CRC_CLOCK_REQUEST_ENABLE (0x00000001) -#define TICKS_PER_JIFFY ((CLOCK_TICK_RATE + (HZ/2)) / HZ) -#define US_PER_TICK ((1000000 + (HZ/2)) / HZ) - static void __iomem *u300_timer_base; +struct u300_clockevent_data { + struct clock_event_device cevd; + unsigned ticks_per_jiffy; +}; + /* * The u300_set_mode() function is always called first, if we * have oneshot timer active, the oneshot scheduling function @@ -197,6 +199,9 @@ static void __iomem *u300_timer_base; static void u300_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) { + struct u300_clockevent_data *cevdata = + container_of(evt, struct u300_clockevent_data, cevd); + switch (mode) { case CLOCK_EVT_MODE_PERIODIC: /* Disable interrupts on GPT1 */ @@ -209,7 +214,7 @@ static void u300_set_mode(enum clock_event_mode mode, * Set the periodic mode to a certain number of ticks per * jiffy. */ - writel(TICKS_PER_JIFFY, + writel(cevdata->ticks_per_jiffy, u300_timer_base + U300_TIMER_APP_GPT1TC); /* * Set continuous mode, so the timer keeps triggering @@ -305,20 +310,23 @@ static int u300_set_next_event(unsigned long cycles, return 0; } - -/* Use general purpose timer 1 as clock event */ -static struct clock_event_device clockevent_u300_1mhz = { - .name = "GPT1", - .rating = 300, /* Reasonably fast and accurate clock event */ - .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, - .set_next_event = u300_set_next_event, - .set_mode = u300_set_mode, +static struct u300_clockevent_data u300_clockevent_data = { + /* Use general purpose timer 1 as clock event */ + .cevd = { + .name = "GPT1", + /* Reasonably fast and accurate clock event */ + .rating = 300, + .features = CLOCK_EVT_FEAT_PERIODIC | + CLOCK_EVT_FEAT_ONESHOT, + .set_next_event = u300_set_next_event, + .set_mode = u300_set_mode, + }, }; /* Clock event timer interrupt handler */ static irqreturn_t u300_timer_interrupt(int irq, void *dev_id) { - struct clock_event_device *evt = &clockevent_u300_1mhz; + struct clock_event_device *evt = &u300_clockevent_data.cevd; /* ACK/Clear timer IRQ for the APP GPT1 Timer */ writel(U300_TIMER_APP_GPT1IA_IRQ_ACK, @@ -379,6 +387,8 @@ static void __init u300_timer_init_of(struct device_node *np) clk_prepare_enable(clk); rate = clk_get_rate(clk); + u300_clockevent_data.ticks_per_jiffy = DIV_ROUND_CLOSEST(rate, HZ); + setup_sched_clock(u300_read_sched_clock, 32, rate); u300_delay_timer.read_current_timer = &u300_read_current_timer; @@ -428,7 +438,7 @@ static void __init u300_timer_init_of(struct device_node *np) pr_err("timer: failed to initialize U300 clock source\n"); /* Configure and register the clockevent */ - clockevents_config_and_register(&clockevent_u300_1mhz, rate, + clockevents_config_and_register(&u300_clockevent_data.cevd, rate, 1, 0xffffffff); /*