From patchwork Mon Jul 8 14:23:01 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 257562 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:770:15f::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id C1E0F2C0087 for ; Tue, 9 Jul 2013 00:22:47 +1000 (EST) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UwCKr-0004LA-P8; Mon, 08 Jul 2013 14:22:38 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UwCKp-0001Uq-3y; Mon, 08 Jul 2013 14:22:35 +0000 Received: from tx2ehsobe004.messaging.microsoft.com ([65.55.88.14] helo=tx2outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UwCKm-0001U7-P6 for linux-arm-kernel@lists.infradead.org; Mon, 08 Jul 2013 14:22:33 +0000 Received: from mail242-tx2-R.bigfish.com (10.9.14.228) by TX2EHSOBE008.bigfish.com (10.9.40.28) with Microsoft SMTP Server id 14.1.225.22; Mon, 8 Jul 2013 14:22:09 +0000 Received: from mail242-tx2 (localhost [127.0.0.1]) by mail242-tx2-R.bigfish.com (Postfix) with ESMTP id 598546017B; Mon, 8 Jul 2013 14:22:09 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz8275dhz2dh87h2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1d0ch1d2eh1d3fh1dfeh1dffh1e23h1151h1155h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail242-tx2 (localhost.localdomain [127.0.0.1]) by mail242-tx2 (MessageSwitch) id 1373293328523077_11222; Mon, 8 Jul 2013 14:22:08 +0000 (UTC) Received: from TX2EHSMHS029.bigfish.com (unknown [10.9.14.253]) by mail242-tx2.bigfish.com (Postfix) with ESMTP id 767FA2600D2; Mon, 8 Jul 2013 14:22:08 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS029.bigfish.com (10.9.99.129) with Microsoft SMTP Server (TLS) id 14.1.225.23; Mon, 8 Jul 2013 14:22:08 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-005.039d.mgd.msft.net (10.84.1.17) with Microsoft SMTP Server (TLS) id 14.3.136.1; Mon, 8 Jul 2013 14:24:17 +0000 Received: from S2101-09.ap.freescale.net ([10.192.185.68]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r68EM47t024218; Mon, 8 Jul 2013 07:22:06 -0700 From: Shawn Guo To: Subject: [PATCH 1/2] ARM: imx: let L2 initialization be a common function Date: Mon, 8 Jul 2013 22:23:01 +0800 Message-ID: <1373293383-15128-2-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1373293383-15128-1-git-send-email-shawn.guo@linaro.org> References: <1373293383-15128-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130708_102232_907882_D9308195 X-CRM114-Status: GOOD ( 14.47 ) X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [65.55.88.14 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Move imx6q L2 initialization function imx6q_init_l2cache() into system.c, and rename it imx_init_l2cache(), so that other platforms other than imx6q can also use the function. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 6 ++++++ arch/arm/mach-imx/mach-imx6q.c | 37 +------------------------------------ arch/arm/mach-imx/system.c | 33 +++++++++++++++++++++++++++++++++ 3 files changed, 40 insertions(+), 36 deletions(-) diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index ee78847..32c751d 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -159,6 +159,12 @@ extern int mx51_neon_fixup(void); static inline int mx51_neon_fixup(void) { return 0; } #endif +#ifdef CONFIG_CACHE_L2X0 +extern void imx_init_l2cache(void); +#else +static inline void imx_init_l2cache(void) {} +#endif + extern struct smp_operations imx_smp_ops; #endif diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 5d3f76b..400e66b 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include #include @@ -351,44 +350,10 @@ static void __init imx6q_map_io(void) imx_scu_map_io(); } -#ifdef CONFIG_CACHE_L2X0 -static void __init imx6q_init_l2cache(void) -{ - void __iomem *l2x0_base; - struct device_node *np; - unsigned int val; - - np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache"); - if (!np) - goto out; - - l2x0_base = of_iomap(np, 0); - if (!l2x0_base) { - of_node_put(np); - goto out; - } - - /* Configure the L2 PREFETCH and POWER registers */ - val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL); - val |= 0x70800000; - writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL); - val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN; - writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL); - - iounmap(l2x0_base); - of_node_put(np); - -out: - l2x0_of_init(0, ~0UL); -} -#else -static inline void imx6q_init_l2cache(void) {} -#endif - static void __init imx6q_init_irq(void) { imx6q_init_revision(); - imx6q_init_l2cache(); + imx_init_l2cache(); imx_src_init(); imx_gpc_init(); irqchip_init(); diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index 7cdc79a..f8211f5 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -27,6 +27,7 @@ #include #include #include +#include #include "common.h" #include "hardware.h" @@ -95,3 +96,35 @@ void __init mxc_arch_reset_init_dt(void) clk_prepare(wdog_clk); } + +#ifdef CONFIG_CACHE_L2X0 +static void __init imx_init_l2cache(void) +{ + void __iomem *l2x0_base; + struct device_node *np; + unsigned int val; + + np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache"); + if (!np) + goto out; + + l2x0_base = of_iomap(np, 0); + if (!l2x0_base) { + of_node_put(np); + goto out; + } + + /* Configure the L2 PREFETCH and POWER registers */ + val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL); + val |= 0x70800000; + writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL); + val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN; + writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL); + + iounmap(l2x0_base); + of_node_put(np); + +out: + l2x0_of_init(0, ~0UL); +} +#endif