From patchwork Wed Mar 27 02:39:18 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Emilio_L=C3=B3pez?= X-Patchwork-Id: 231583 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 82EC72C0089 for ; Wed, 27 Mar 2013 13:47:31 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UKgLJ-0000ce-Qm; Wed, 27 Mar 2013 02:44:02 +0000 Received: from [2606:3f00:60:21c:d00d:c0de:4:f00d] (helo=zetta.elopez.com.ar) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UKgLH-0000cF-Dq for linux-arm-kernel@lists.infradead.org; Wed, 27 Mar 2013 02:43:59 +0000 Received: from 201-212-118-238.prima.net.ar ([201.212.118.238] helo=desktop.lan) by zetta.elopez.com.ar with esmtpsa (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) id 1UKgLC-0005IM-Sj; Tue, 26 Mar 2013 23:43:55 -0300 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= To: Maxime Ripard , Arnd Bergmann , Mike Turquette Subject: [PATCH 2/2] arm: sunxi: rename clock compatible strings Date: Tue, 26 Mar 2013 23:39:18 -0300 Message-Id: <1364351958-14503-3-git-send-email-emilio@elopez.com.ar> X-Mailer: git-send-email 1.8.2 In-Reply-To: <1364351958-14503-1-git-send-email-emilio@elopez.com.ar> References: <1364351958-14503-1-git-send-email-emilio@elopez.com.ar> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130326_224359_494052_DD2826CD X-CRM114-Status: UNSURE ( 9.25 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.1 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.8 RDNS_NONE Delivered to internal network by a host with no rDNS Cc: =?UTF-8?q?Emilio=20L=C3=B3pez?= , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org During the introduction of the Allwinner SoC platforms, sunxi was initially meant as a generic name for all the variants of the Allwinner SoC. It was ok at the time of the support of only the A10 and A13 that look pretty much the same; but it's beginning to be troublesome with the future addition of the Allwinner A31 (sun6i) that is quite different, and would introduce some weird logic, where sunxi would actually mean in some case sun4i and sun5i but without sun6i... Moreover, it makes the compatible strings naming scheme not consistent with other architectures, where usually for this kind of compability, we just use the oldest SoC name that has this IP, so let's do just this. Signed-off-by: Emilio López --- These compatible strings have never been on a released kernel, so changing them now shouldn't cause any issues. Also see Maxime's "ARM: sunxi: Architecture cleanups and rework" which does the same for the rest of sunxi code. arch/arm/boot/dts/sunxi.dtsi | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/sunxi.dtsi b/arch/arm/boot/dts/sunxi.dtsi index cafd393..40392de 100644 --- a/arch/arm/boot/dts/sunxi.dtsi +++ b/arch/arm/boot/dts/sunxi.dtsi @@ -47,7 +47,7 @@ osc24M: osc24M@01c20050 { #clock-cells = <0>; - compatible = "allwinner,sunxi-osc-clk"; + compatible = "allwinner,sun4i-osc-clk"; reg = <0x01c20050 0x4>; clocks = <&osc24M_fixed>; }; @@ -60,7 +60,7 @@ pll1: pll1@01c20000 { #clock-cells = <0>; - compatible = "allwinner,sunxi-pll1-clk"; + compatible = "allwinner,sun4i-pll1-clk"; reg = <0x01c20000 0x4>; clocks = <&osc24M>; }; @@ -68,28 +68,28 @@ /* dummy is 200M */ cpu: cpu@01c20054 { #clock-cells = <0>; - compatible = "allwinner,sunxi-cpu-clk"; + compatible = "allwinner,sun4i-cpu-clk"; reg = <0x01c20054 0x4>; clocks = <&osc32k>, <&osc24M>, <&pll1>, <&dummy>; }; axi: axi@01c20054 { #clock-cells = <0>; - compatible = "allwinner,sunxi-axi-clk"; + compatible = "allwinner,sun4i-axi-clk"; reg = <0x01c20054 0x4>; clocks = <&cpu>; }; ahb: ahb@01c20054 { #clock-cells = <0>; - compatible = "allwinner,sunxi-ahb-clk"; + compatible = "allwinner,sun4i-ahb-clk"; reg = <0x01c20054 0x4>; clocks = <&axi>; }; apb0: apb0@01c20054 { #clock-cells = <0>; - compatible = "allwinner,sunxi-apb0-clk"; + compatible = "allwinner,sun4i-apb0-clk"; reg = <0x01c20054 0x4>; clocks = <&ahb>; }; @@ -97,14 +97,14 @@ /* dummy is pll62 */ apb1_mux: apb1_mux@01c20058 { #clock-cells = <0>; - compatible = "allwinner,sunxi-apb1-mux-clk"; + compatible = "allwinner,sun4i-apb1-mux-clk"; reg = <0x01c20058 0x4>; clocks = <&osc24M>, <&dummy>, <&osc32k>; }; apb1: apb1@01c20058 { #clock-cells = <0>; - compatible = "allwinner,sunxi-apb1-clk"; + compatible = "allwinner,sun4i-apb1-clk"; reg = <0x01c20058 0x4>; clocks = <&apb1_mux>; };