From patchwork Fri Mar 1 11:37:52 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martin X-Patchwork-Id: 224291 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2A1052C02A2 for ; Fri, 1 Mar 2013 22:42:29 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UBOI8-0002K5-I2; Fri, 01 Mar 2013 11:38:20 +0000 Received: from mail-we0-x235.google.com ([2a00:1450:400c:c03::235]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UBOI0-0002Iq-Je for linux-arm-kernel@lists.infradead.org; Fri, 01 Mar 2013 11:38:13 +0000 Received: by mail-we0-f181.google.com with SMTP id t44so2385078wey.26 for ; Fri, 01 Mar 2013 03:38:09 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=5VDPw5jo6VSpylTBeeYDuPx/3lgGFP4WDFFcpUvvfNA=; b=JwX+XolowmHz3vbJtlUW5ulyN3Hd8aOdTp3msnjd83PC758kQBq6FYqkDlAeimdubQ S1HYn0DVvvGecaZ5MfMjRhkPTMU9qWIImMPHp22QvthzoB2L0C7w1K8/Ao0qYKfDmuu0 fTUYXFTDk6frJ1uEZUuOc+cYx6tOu/sGC2/Gu25c/ILmO3pPRO/aFJ3FlbnVn+0x63xn 0WI8OXyu8VuBml79xjs6+3MsA6ScS/L+8RI11zLQOqq97QgVCsg8CnhTXEA34FvAPznz BnMNhc+OxmGxHsi0O8oTNgM8BRzQfi82B6y4gs2wU0lw2+/AY8nDXUyLM//rSrY6wRAe Nv3w== X-Received: by 10.180.92.39 with SMTP id cj7mr6384382wib.19.1362137889824; Fri, 01 Mar 2013 03:38:09 -0800 (PST) Received: from piscis.vsilicon.net (38.89.18.95.dynamic.jazztel.es. [95.18.89.38]) by mx.google.com with ESMTPS id fv2sm21443078wib.6.2013.03.01.03.38.07 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 01 Mar 2013 03:38:09 -0800 (PST) From: Javier Martin To: linux-crypto@vger.kernel.org Subject: [PATCH v3 1/2] i.MX27: Add clock support for SAHARA2. Date: Fri, 1 Mar 2013 12:37:52 +0100 Message-Id: <1362137873-8827-2-git-send-email-javier.martin@vista-silicon.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1362137873-8827-1-git-send-email-javier.martin@vista-silicon.com> References: <1362137873-8827-1-git-send-email-javier.martin@vista-silicon.com> X-Gm-Message-State: ALoCoQlvbipN3nRPAaKZCagKS66MHQYiHNkhYtAz917Uk0HF99GVg9YGI+QMIgQdnQbfdcCsbCRn X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130301_063812_760769_D7641812 X-CRM114-Status: UNSURE ( 9.78 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: swarren@nvidia.com, herbert@gondor.apana.org.au, arnd@arndb.de, linux-doc@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, Javier Martin , kernel@pengutronix.de, shawn.guo@linaro.org, davem@davemloft.net, linux-arm-kernel@lists.infradead.org, gcembed@gmail.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Signed-off-by: Javier Martin --- arch/arm/mach-imx/clk-imx27.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index 4c1d1e4..0b9664a 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c @@ -253,6 +253,8 @@ int __init mx27_clocks_init(unsigned long fref) clk_register_clkdev(clk[nfc_baud_gate], NULL, "imx27-nand.0"); clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0"); clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0"); + clk_register_clkdev(clk[sahara_ahb_gate], "ahb", "sahara-imx27.0"); + clk_register_clkdev(clk[sahara_ipg_gate], "ipg", "sahara-imx27.0"); clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx27-dma"); clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx27-dma"); clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0");