From patchwork Wed Feb 27 10:41:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martin X-Patchwork-Id: 223580 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A4E792C0086 for ; Wed, 27 Feb 2013 21:46:06 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UAeSs-0003Sy-4a; Wed, 27 Feb 2013 10:42:22 +0000 Received: from mail-wg0-f46.google.com ([74.125.82.46]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UAeSa-0003Pk-RO for linux-arm-kernel@lists.infradead.org; Wed, 27 Feb 2013 10:42:06 +0000 Received: by mail-wg0-f46.google.com with SMTP id fg15so317865wgb.13 for ; Wed, 27 Feb 2013 02:42:02 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=5VDPw5jo6VSpylTBeeYDuPx/3lgGFP4WDFFcpUvvfNA=; b=LXSdYraHGM2Ozpd0j1tOSd7K0wBczRVyq98AzrGhxtJdQKBnybtl9nyZ2IVkYXKNZB BpvssH5LbiJsAH8DVGVQ64O2H4AuAXFbZzp2ZpC7orI89bcWE8CEeI/hhpvXlzpTWzGy Y15Dv9f9QPZjjcfmmc74XGX81QAraSC+RaOHe5e1Gr+DL4rRECvkQh9cXMwkfTAojx0Q QN3ubv8KW0rr+/8T+Rm6e7qmeaZQJ6dzf1Fj5/REZQ6wu1xIeA3ixdKIfJQmiQ+U1HTM FQXrvxxt7NYO3+UFrsiQ178RQFektIw8MOOaq0JbKFOfoN0vQFWUGx/93M2D9U509ATl 4SNQ== X-Received: by 10.194.235.196 with SMTP id uo4mr2876177wjc.30.1361961722921; Wed, 27 Feb 2013 02:42:02 -0800 (PST) Received: from piscis.vsilicon.net (250.81.18.95.dynamic.jazztel.es. [95.18.81.250]) by mx.google.com with ESMTPS id fv2sm7795853wib.6.2013.02.27.02.42.00 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 27 Feb 2013 02:42:02 -0800 (PST) From: Javier Martin To: linux-crypto@vger.kernel.org Subject: [PATCH v2 1/3] i.MX27: Add clock support for SAHARA2. Date: Wed, 27 Feb 2013 11:41:49 +0100 Message-Id: <1361961711-4603-2-git-send-email-javier.martin@vista-silicon.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1361961711-4603-1-git-send-email-javier.martin@vista-silicon.com> References: <1361961711-4603-1-git-send-email-javier.martin@vista-silicon.com> X-Gm-Message-State: ALoCoQkdTK4hZ3DNvmmy/9xhKdQc0MNeu6VULeBc3esURM1tWvxNrWJ3paUPHYBE2Qw6/fHGJVO5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130227_054204_987768_2B8904EE X-CRM114-Status: UNSURE ( 9.96 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.46 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: swarren@nvidia.com, herbert@gondor.apana.org.au, arnd@arndb.de, linux-doc@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, Javier Martin , kernel@pengutronix.de, shawn.guo@linaro.org, davem@davemloft.net, linux-arm-kernel@lists.infradead.org, gcembed@gmail.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Signed-off-by: Javier Martin --- arch/arm/mach-imx/clk-imx27.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index 4c1d1e4..0b9664a 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c @@ -253,6 +253,8 @@ int __init mx27_clocks_init(unsigned long fref) clk_register_clkdev(clk[nfc_baud_gate], NULL, "imx27-nand.0"); clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0"); clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0"); + clk_register_clkdev(clk[sahara_ahb_gate], "ahb", "sahara-imx27.0"); + clk_register_clkdev(clk[sahara_ipg_gate], "ipg", "sahara-imx27.0"); clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx27-dma"); clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx27-dma"); clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0");