From patchwork Wed Sep 12 14:58:23 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 183399 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (unknown [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CEBB82C008D for ; Thu, 13 Sep 2012 01:12:46 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TBoQC-0007uE-Jd; Wed, 12 Sep 2012 15:00:08 +0000 Received: from moutng.kundenserver.de ([212.227.17.10]) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1TBoOp-0007Xa-Hk for linux-arm-kernel@lists.infradead.org; Wed, 12 Sep 2012 14:58:52 +0000 Received: from klappe2.boeblingen.de.ibm.com (deibp9eh1--blueice3n2.emea.ibm.com [195.212.29.180]) by mrelayeu.kundenserver.de (node=mreu4) with ESMTP (Nemesis) id 0LqacI-1Th2PV00he-00eILT; Wed, 12 Sep 2012 16:58:39 +0200 From: Arnd Bergmann To: Marc Zyngier Subject: [PATCH v9 10/13] ARM: SoC: convert imx6q to SoC descriptor Date: Wed, 12 Sep 2012 16:58:23 +0200 Message-Id: <1347461906-13527-11-git-send-email-arnd@arndb.de> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1347461906-13527-1-git-send-email-arnd@arndb.de> References: <1347461906-13527-1-git-send-email-arnd@arndb.de> X-Provags-ID: V02:K0:s4TvzrSSUYcdZn1VWLbDDKomKdzN99Rul/w3pkyCdLj 3+TyL77bYhgho17DVJnxc1Rl4FNrO46a9M7K8kUh3RNnEp+S5s nXjroioWxm20ixlImQ68TSW6YATeK1W8stziMukIJXPebKLMsp NIO5cdXchML5tjIHB8vPX5/uSIRgvi4/73ptxDYPYO8PH1xrgL Ryp39Fv1XUCUYGYMvKBusdS6OJgh4q3fPrcI66SFSWCAbsJbBH zjJHclQ0693ba0omL/zZJ5IlhaTczM3T6rRGvSWnoxpcl+/SYy MJxGSWiWP+3hHDExcAgdof2SfP74aUufvX2lNynNo9Gz8emdoY zfU3+LKm8qV32iffpmsWRMhA28ZlIJpjhkVJkWOyQO8R0PpQ15 c335l6RZi9RbpEkuZBHI4WjcL+L55+PYl4= X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [212.227.17.10 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Shawn Guo , Arnd Bergmann , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org From: Marc Zyngier Convert the imx6q platform to use the SoC descriptor to provide its SMP and CPU hotplug operations. Cc: Shawn Guo Signed-off-by: Marc Zyngier Signed-off-by: Arnd Bergmann Acked-by: Shawn Guo --- arch/arm/mach-imx/hotplug.c | 16 +--------------- arch/arm/mach-imx/mach-imx6q.c | 1 + arch/arm/mach-imx/platsmp.c | 18 ++++++++++++++---- arch/arm/plat-mxc/include/mach/common.h | 4 ++++ 4 files changed, 20 insertions(+), 19 deletions(-) diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c index f8f7437..b07b778 100644 --- a/arch/arm/mach-imx/hotplug.c +++ b/arch/arm/mach-imx/hotplug.c @@ -15,11 +15,6 @@ #include #include -int platform_cpu_kill(unsigned int cpu) -{ - return 1; -} - static inline void cpu_enter_lowpower(void) { unsigned int v; @@ -47,7 +42,7 @@ static inline void cpu_enter_lowpower(void) * * Called with IRQs disabled */ -void platform_cpu_die(unsigned int cpu) +void imx_cpu_die(unsigned int cpu) { cpu_enter_lowpower(); imx_enable_cpu(cpu, false); @@ -56,12 +51,3 @@ void platform_cpu_die(unsigned int cpu) while (1) ; } - -int platform_cpu_disable(unsigned int cpu) -{ - /* - * we don't allow CPU 0 to be shutdown (it is still too special - * e.g. clock tick interrupts) - */ - return cpu == 0 ? -EPERM : 0; -} diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 045b3f6..ef0b52f 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -226,6 +226,7 @@ static const char *imx6q_dt_compat[] __initdata = { }; DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)") + .smp = smp_ops(imx6q_soc_desc), .map_io = imx6q_map_io, .init_irq = imx6q_init_irq, .handle_irq = imx6q_handle_irq, diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c index ab98c6f..2ac43e1 100644 --- a/arch/arm/mach-imx/platsmp.c +++ b/arch/arm/mach-imx/platsmp.c @@ -41,7 +41,7 @@ void __init imx_scu_map_io(void) scu_base = IMX_IO_ADDRESS(base); } -void __cpuinit platform_secondary_init(unsigned int cpu) +static void __cpuinit imx_secondary_init(unsigned int cpu) { /* * if any interrupts are already enabled for the primary @@ -51,7 +51,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) gic_secondary_init(0); } -int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) +static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle) { imx_set_cpu_jump(cpu, v7_secondary_startup); imx_enable_cpu(cpu, true); @@ -62,7 +62,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * Initialise the CPU possible map early - this describes the CPUs * which may be present or become present in the system. */ -void __init smp_init_cpus(void) +static void __init imx_smp_init_cpus(void) { int i, ncores; @@ -79,7 +79,17 @@ void imx_smp_prepare(void) scu_enable(scu_base); } -void __init platform_smp_prepare_cpus(unsigned int max_cpus) +static void __init imx_smp_prepare_cpus(unsigned int max_cpus) { imx_smp_prepare(); } + +struct smp_operations imx_smp_ops __initdata = { + .smp_init_cpus = imx_smp_init_cpus, + .smp_prepare_cpus = imx_smp_prepare_cpus, + .smp_secondary_init = imx_secondary_init, + .smp_boot_secondary = imx_boot_secondary, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_die = imx_cpu_die, +#endif +}; diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 7128e97..e8b5150 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -145,6 +145,8 @@ extern void imx53_smd_common_init(void); extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); extern void imx6q_clock_map_io(void); +extern void imx_cpu_die(unsigned int cpu); + #ifdef CONFIG_PM extern void imx6q_pm_init(void); extern void imx51_pm_init(void); @@ -161,4 +163,6 @@ extern int mx51_neon_fixup(void); static inline int mx51_neon_fixup(void) { return 0; } #endif +extern struct smp_operations imx_smp_ops; + #endif