From patchwork Fri Aug 10 11:53:24 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 176470 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (unknown [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 11B9F2C0084 for ; Fri, 10 Aug 2012 21:57:12 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Sznmg-0002bK-67; Fri, 10 Aug 2012 11:53:42 +0000 Received: from mail-ey0-f177.google.com ([209.85.215.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Sznmc-0002b6-6U for linux-arm-kernel@lists.infradead.org; Fri, 10 Aug 2012 11:53:39 +0000 Received: by eaai12 with SMTP id i12so380857eaa.36 for ; Fri, 10 Aug 2012 04:53:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:x-gm-message-state; bh=EK9sFAY6x42qOxJkXuXzE1bCAcOCAGkdiHOKZUiG18U=; b=T45EDx4Fpu93V7G4E40Hl5w7+9/dgUs3F8/j/RSsqvZVWSlBa9wgsRgfLIcnraU++N enNEiOSc4xX7TpNPD4J8HXzHMeVv603ml04GOqX2ahV5YVXmj85CiYWm5QrquC6bIf/o e37rAQPw7kIebIu/7XM9AsPah+VSE141wsy9LeRwpvvB9q9/e0enL1ZR9savsUvFiI9j hFi0myTT76/w9p8nj28Xda+hYwPT82y+O98q13Er8sfrWesCG6EYzZEi4pJSipRHReCL 33Slb2R45qoxqejOqi5BV0XbkF8LxPBNhBViwhSLX2McANWgZsZCkX7o/YEsdW+wZzNa gKew== Received: by 10.14.204.72 with SMTP id g48mr2779000eeo.45.1344599614949; Fri, 10 Aug 2012 04:53:34 -0700 (PDT) Received: from e103592.peterhouse.linaro.org (fw-lnat.cambridge.arm.com. [217.140.96.63]) by mx.google.com with ESMTPS id c6sm10907595eep.7.2012.08.10.04.53.33 (version=SSLv3 cipher=OTHER); Fri, 10 Aug 2012 04:53:34 -0700 (PDT) From: Dave Martin To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: mxc: ssi-fiq: Make ssi-fiq.S Thumb-2 compatible Date: Fri, 10 Aug 2012 12:53:24 +0100 Message-Id: <1344599604-9623-1-git-send-email-dave.martin@linaro.org> X-Mailer: git-send-email 1.7.4.1 X-Gm-Message-State: ALoCoQnKMHljcXB+uDkTjVD3xOxXJHKaqToHf8V7sB+WK/swp+Aqpfj6PBDppHNZ/7n/Id795Tyl X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.215.177 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: patches@linaro.org, Matt Sealey , Mark Brown , Anton Vorontsov , Sascha Hauer , Steev Klimaszewski , Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Because FIQ handlers get copied straight into the vectors page to the FIQ vector entry point, FIQ handlers in a Thumb-2 kernel must start in Thumb-2. A Thumb-2 kernel enters all exception vectors in Thumb-2. This patch adapts the mxc SSI FIQ code suitable for a Thumb-2 kernel. The code contained use of r13 (sp) which isn't allowed in Thumb-2. r11 and r13 have been swapped throughout the file to work around this. Currently, the way that the function to be copied is located using labels is a bit ugly: we cannot annotate the FIQ handler properly as a Thumb-2 function, because this would set bit 0 of the label address seen by the linker, causing off-by-one errors when copying the function. Ideally, the copy would be done with fncpy(), but this would require changes to the common set_fiq_handler() function. For now, we don't touch this. References to locally-defined global symbols with adr and ldr may not be accepted by the assembler in Thumb-2. Local shadow symbols are added to work around this. Signed-off-by: Dave Martin Tested-by: Sascha Hauer --- Note that while this code builds, I don't know the hardware well enough to be confident testing it. Review and testing from anyone with experience of imx SoC audio would be appreciated. arch/arm/plat-mxc/ssi-fiq.S | 89 ++++++++++++++++++++++++------------------- 1 files changed, 50 insertions(+), 39 deletions(-) diff --git a/arch/arm/plat-mxc/ssi-fiq.S b/arch/arm/plat-mxc/ssi-fiq.S index 8397a2d..a8b93c5 100644 --- a/arch/arm/plat-mxc/ssi-fiq.S +++ b/arch/arm/plat-mxc/ssi-fiq.S @@ -34,91 +34,98 @@ .global imx_ssi_fiq_rx_buffer .global imx_ssi_fiq_tx_buffer +/* + * imx_ssi_fiq_start is _intentionally_ not marked as a function symbol + * using ENDPROC(). imx_ssi_fiq_start and imx_ssi_fiq_end are used to + * mark the function body so that it can be copied to the FIQ vector in + * the vectors page. imx_ssi_fiq_start should only be called as the result + * of an FIQ: calling it directly will not work. + */ imx_ssi_fiq_start: - ldr r12, imx_ssi_fiq_base + ldr r12, .L_imx_ssi_fiq_base /* TX */ - ldr r11, imx_ssi_fiq_tx_buffer + ldr r13, .L_imx_ssi_fiq_tx_buffer /* shall we send? */ - ldr r13, [r12, #SSI_SIER] - tst r13, #SSI_SIER_TFE0_EN + ldr r11, [r12, #SSI_SIER] + tst r11, #SSI_SIER_TFE0_EN beq 1f /* TX FIFO empty? */ - ldr r13, [r12, #SSI_SISR] - tst r13, #SSI_SISR_TFE0 + ldr r11, [r12, #SSI_SISR] + tst r11, #SSI_SISR_TFE0 beq 1f mov r10, #0x10000 sub r10, #1 and r10, r10, r8 /* r10: current buffer offset */ - add r11, r11, r10 + add r13, r13, r10 - ldrh r13, [r11] - strh r13, [r12, #SSI_STX0] + ldrh r11, [r13] + strh r11, [r12, #SSI_STX0] - ldrh r13, [r11, #2] - strh r13, [r12, #SSI_STX0] + ldrh r11, [r13, #2] + strh r11, [r12, #SSI_STX0] - ldrh r13, [r11, #4] - strh r13, [r12, #SSI_STX0] + ldrh r11, [r13, #4] + strh r11, [r12, #SSI_STX0] - ldrh r13, [r11, #6] - strh r13, [r12, #SSI_STX0] + ldrh r11, [r13, #6] + strh r11, [r12, #SSI_STX0] add r10, #8 - lsr r13, r8, #16 /* r13: buffer size */ - cmp r10, r13 - lslgt r8, r13, #16 + lsr r11, r8, #16 /* r11: buffer size */ + cmp r10, r11 + lslgt r8, r11, #16 addle r8, #8 1: /* RX */ /* shall we receive? */ - ldr r13, [r12, #SSI_SIER] - tst r13, #SSI_SIER_RFF0_EN + ldr r11, [r12, #SSI_SIER] + tst r11, #SSI_SIER_RFF0_EN beq 1f /* RX FIFO full? */ - ldr r13, [r12, #SSI_SISR] - tst r13, #SSI_SISR_RFF0 + ldr r11, [r12, #SSI_SISR] + tst r11, #SSI_SISR_RFF0 beq 1f - ldr r11, imx_ssi_fiq_rx_buffer + ldr r13, .L_imx_ssi_fiq_rx_buffer mov r10, #0x10000 sub r10, #1 and r10, r10, r9 /* r10: current buffer offset */ - add r11, r11, r10 + add r13, r13, r10 - ldr r13, [r12, #SSI_SACNT] - tst r13, #SSI_SACNT_AC97EN + ldr r11, [r12, #SSI_SACNT] + tst r11, #SSI_SACNT_AC97EN - ldr r13, [r12, #SSI_SRX0] - strh r13, [r11] + ldr r11, [r12, #SSI_SRX0] + strh r11, [r13] - ldr r13, [r12, #SSI_SRX0] - strh r13, [r11, #2] + ldr r11, [r12, #SSI_SRX0] + strh r11, [r13, #2] /* dummy read to skip slot 12 */ - ldrne r13, [r12, #SSI_SRX0] + ldrne r11, [r12, #SSI_SRX0] - ldr r13, [r12, #SSI_SRX0] - strh r13, [r11, #4] + ldr r11, [r12, #SSI_SRX0] + strh r11, [r13, #4] - ldr r13, [r12, #SSI_SRX0] - strh r13, [r11, #6] + ldr r11, [r12, #SSI_SRX0] + strh r11, [r13, #6] /* dummy read to skip slot 12 */ - ldrne r13, [r12, #SSI_SRX0] + ldrne r11, [r12, #SSI_SRX0] add r10, #8 - lsr r13, r9, #16 /* r13: buffer size */ - cmp r10, r13 - lslgt r9, r13, #16 + lsr r11, r9, #16 /* r11: buffer size */ + cmp r10, r11 + lslgt r9, r11, #16 addle r9, #8 1: @@ -126,11 +133,15 @@ imx_ssi_fiq_start: subs pc, lr, #4 .align +.L_imx_ssi_fiq_base: imx_ssi_fiq_base: .word 0x0 +.L_imx_ssi_fiq_rx_buffer: imx_ssi_fiq_rx_buffer: .word 0x0 +.L_imx_ssi_fiq_tx_buffer: imx_ssi_fiq_tx_buffer: .word 0x0 +.L_imx_ssi_fiq_end: imx_ssi_fiq_end: