From patchwork Mon May 21 22:50:25 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Lee X-Patchwork-Id: 160493 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 92127B6F9D for ; Tue, 22 May 2012 08:54:14 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SWbRR-0002pH-E4; Mon, 21 May 2012 22:51:05 +0000 Received: from mail-yw0-f49.google.com ([209.85.213.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SWbR2-0002m6-PG for linux-arm-kernel@lists.infradead.org; Mon, 21 May 2012 22:50:41 +0000 Received: by mail-yw0-f49.google.com with SMTP id j52so5616067yhj.36 for ; Mon, 21 May 2012 15:50:40 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=kFeR8fzcer9DOlNCl0QCAAA9iO/xIzXZihPvKG8YdMw=; b=ntCveAXw83xFlfv+JZHW1+kstdya/9Q1b35lt/KNMBRelA9mBF+LvkbQ1Oe24aA66p +IS1hC6lynXU+galtvt1ehmD73awezesC3avXH0eAtDbCzq2IW5drA48HvX77bRaiTpw mE3i/IDjpMd0IIOBMEpYeN6aWcJAt32YOt/CzHXPt2f9TUO4py+zzySYZ1v+q62CELjJ eprYnRo6scsWENRaTiJdqwaP2TaSAHFLOxVcJbHK3nr5awaM9IPffRZ5LLrcqDK4q4D8 Cz5GotWnn9/I1Gc0JGLfnMR0E541f47tSUdyHt03BC5JA3vMvMLNM6iXKL3XYzQelBjf 2L4A== Received: by 10.50.158.134 with SMTP id wu6mr8039704igb.47.1337640640486; Mon, 21 May 2012 15:50:40 -0700 (PDT) Received: from localhost.localdomain ([216.59.27.6]) by mx.google.com with ESMTPS id dk9sm8682082igb.13.2012.05.21.15.50.38 (version=SSLv3 cipher=OTHER); Mon, 21 May 2012 15:50:39 -0700 (PDT) From: Robert Lee To: kernel@pengutronix.de Subject: [PATCH v5 2/7] ARM: imx: Add comments to tzic_enable_waker() Date: Mon, 21 May 2012 17:50:25 -0500 Message-Id: <1337640630-29176-3-git-send-email-rob.lee@linaro.org> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1337640630-29176-1-git-send-email-rob.lee@linaro.org> References: <1337640630-29176-1-git-send-email-rob.lee@linaro.org> X-Gm-Message-State: ALoCoQkklmmfUn0yMKyrugcgrHWI4kR3wmowBySWehDR7+LlhMKv+py+F0LRjPKKOa0E3pbmv7jj X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.213.49 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linaro-dev@lists.linaro.org, patches@linaro.org, daniel.lezcano@linaro.org, linux-kernel@vger.kernel.org, amit.kucheria@linaro.org, jj@chaosbits.net, richard.zhao@freescale.com, u.kleine-koenig@pengutronix.de, shawn.guo@linaro.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Add additional comments to the tzic_enable_wake() funciton to clarify its intended usage. Signed-off-by: Robert Lee --- arch/arm/plat-mxc/tzic.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index 98308ec..a45dbea 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c @@ -190,6 +190,10 @@ void __init tzic_init_irq(void __iomem *irqbase) * tzic_enable_wake() - enable wakeup interrupt * * @return 0 if successful; non-zero otherwise + * + * This function provides an interrupt synchronization point that is required + * by tzic enabled platforms before entering imx specific low power modes (ie, + * those low power modes beyond the WAIT_CLOCKED basic ARM WFI only mode). */ int tzic_enable_wake(void) {