From patchwork Mon May 7 21:16:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Lee X-Patchwork-Id: 157471 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 8A9B5B6FA9 for ; Tue, 8 May 2012 07:19:23 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SRVIx-0006oC-GR; Mon, 07 May 2012 21:17:15 +0000 Received: from mail-gg0-f177.google.com ([209.85.161.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SRVIi-0006mj-3P for linux-arm-kernel@lists.infradead.org; Mon, 07 May 2012 21:17:00 +0000 Received: by mail-gg0-f177.google.com with SMTP id s5so417038ggc.36 for ; Mon, 07 May 2012 14:17:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=43vZoX4c10hrqdEt8LgRrLe1mjxBQdvAFyl24I0+dDg=; b=irwzvhmdxtqZLZCphIKjzSY+OC096ZUWSdbPHUXGVSe282WJTnm9Xc0diTDFQIUe3O o/mqbu91DauwZot3xmZXFcpIVhBIncpRE7crIlUufHd5k3J5LWobHM5oebausZzdw3Zm /+gE/98h0TwZ0Eqvg4968jLykAXmsEy0JBOuvJQINtR+UkAavm2TMuPzJvPSSv+yVmyT AyT3xMBVar01rOn07Ko49TN29xpXB4uDPXlOBnBoYhPLJZ1+acDLpndEFkO53xC4GdHa krWsDhguOx6cPcWsFnLyepBAOhsDcudJmUTNsW44Ocgl6DpmD5/tWsmSe0OvmlroXb/L bu4w== Received: by 10.50.219.170 with SMTP id pp10mr9075015igc.25.1336425419667; Mon, 07 May 2012 14:16:59 -0700 (PDT) Received: from localhost.localdomain ([216.59.27.36]) by mx.google.com with ESMTPS id kn9sm6940883igc.8.2012.05.07.14.16.55 (version=SSLv3 cipher=OTHER); Mon, 07 May 2012 14:16:58 -0700 (PDT) From: Robert Lee To: kernel@pengutronix.de Subject: [PATCH v3 2/3] ARM: imx: Add imx5 cpuidle driver Date: Mon, 7 May 2012 16:16:46 -0500 Message-Id: <1336425407-20308-3-git-send-email-rob.lee@linaro.org> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1336425407-20308-1-git-send-email-rob.lee@linaro.org> References: <1336425407-20308-1-git-send-email-rob.lee@linaro.org> X-Gm-Message-State: ALoCoQmEugBGG2oLeKb4+7gv9NJUb1t83LBC10Z/Zeht+FLpAV54KpwVke7kL2gt3Hx9pPHX00pi X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.161.177 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linaro-dev@lists.linaro.org, patches@linaro.org, daniel.lezcano@linaro.org, linux-kernel@vger.kernel.org, amit.kucheria@linaro.org, jj@chaosbits.net, shawn.guo@linaro.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Add imx5 cpuidle driver. Signed-off-by: Robert Lee --- arch/arm/mach-imx/mm-imx5.c | 42 +++++++++++++++++++++++++++++++++++++++--- 1 file changed, 39 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index d6b7e9f..0b3a4cc 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c @@ -20,26 +20,61 @@ #include #include +#include #include #include static struct clk *gpc_dvfs_clk; -static void imx5_idle(void) +static int imx5_idle(void) { + int ret = 0; + /* gpc clock is needed for SRPG */ if (gpc_dvfs_clk == NULL) { gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); if (IS_ERR(gpc_dvfs_clk)) - return; + return -ENODEV; } clk_enable(gpc_dvfs_clk); mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); if (!tzic_enable_wake()) cpu_do_idle(); + else + ret = -EBUSY; clk_disable(gpc_dvfs_clk); + + return ret; +} + +static int imx5_cpuidle_enter(struct cpuidle_device *dev, + struct cpuidle_driver *drv, int idx) +{ + int ret; + + ret = imx5_idle(); + + if (ret < 0) + return ret; + + return idx; } +static struct cpuidle_driver imx5_cpuidle_driver = { + .name = "imx5_cpuidle", + .owner = THIS_MODULE, + .en_core_tk_irqen = 1, + .states[0] = { + .enter = imx5_cpuidle_enter, + .exit_latency = 20, /* max latency at 160MHz */ + .target_residency = 1, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "IMX5 SRPG", + .desc = "CPU state retained,powered off", + }, + .state_count = 1, +}; + /* * Define the MX50 memory map. */ @@ -103,7 +138,7 @@ void __init imx51_init_early(void) mxc_set_cpu_type(MXC_CPU_MX51); mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); - arm_pm_idle = imx5_idle; + arm_pm_idle = (void (*)(void))imx5_idle; } void __init imx53_init_early(void) @@ -238,4 +273,5 @@ void __init imx53_soc_init(void) void __init imx51_init_late(void) { mx51_neon_fixup(); + imx_cpuidle_init(&imx5_cpuidle_driver); }