From patchwork Thu Dec 22 13:48:24 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Miao X-Patchwork-Id: 132848 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1BB87B717B for ; Fri, 23 Dec 2011 00:51:21 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Rdj0h-0005lr-4s; Thu, 22 Dec 2011 13:48:39 +0000 Received: from mail-iy0-f177.google.com ([209.85.210.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Rdj0d-0005lF-7n for linux-arm-kernel@lists.infradead.org; Thu, 22 Dec 2011 13:48:35 +0000 Received: by iadk27 with SMTP id k27so14482815iad.36 for ; Thu, 22 Dec 2011 05:48:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=sender:from:to:cc:subject:date:message-id:x-mailer; bh=aoGJfDL9wgwWCaRLV+0hRS2rlYSnv6JUUa5XESWCTXY=; b=d3PE5METxmQG95O6qiyzK2ftNDsJvzmtDafIo1Qz3RCP4v8ginCDGR7dYgk7FOGGiH ZIyBRcnwdFL9ji3Vzea8KiKWExnrwPRBAu2LP0IfUfrakgOi9ArBiSaepeyvfsDvNQWE QAQfpUwlBMWXKEUIlWElQ9ngc9nNibwTfpDss= Received: by 10.50.168.3 with SMTP id zs3mr8803614igb.29.1324561713649; Thu, 22 Dec 2011 05:48:33 -0800 (PST) Received: from ycmiao-macbookpro.ericsmarthome.org ([112.64.70.204]) by mx.google.com with ESMTPS id f32sm26094370ibf.9.2011.12.22.05.48.29 (version=SSLv3 cipher=OTHER); Thu, 22 Dec 2011 05:48:33 -0800 (PST) From: Eric Miao To: linux-arm-kernel Subject: [PATCH] ARM: imx6q: add support for IRAM Date: Thu, 22 Dec 2011 21:48:24 +0800 Message-Id: <1324561704-4145-1-git-send-email-eric.miao@linaro.org> X-Mailer: git-send-email 1.7.5.4 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.177 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (eric.y.miao[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Jason Chen , Eric Miao X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org From: Jason Chen Signed-off-by: Jason Chen Signed-off-by: Eric Miao --- arch/arm/mach-imx/Kconfig | 1 + arch/arm/mach-imx/clock-imx6q.c | 3 ++- arch/arm/mach-imx/mach-imx6q.c | 3 +++ arch/arm/plat-mxc/include/mach/mx6q.h | 6 ++++++ 4 files changed, 12 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 6ee6803..023d240 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -602,6 +602,7 @@ config SOC_IMX6Q select HAVE_IMX_GPC select HAVE_IMX_MMDC select HAVE_IMX_SRC + select IRAM_ALLOC select ARM_CPU_SUSPEND if PM select USE_OF diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c index 039a7ab..b347a84 100644 --- a/arch/arm/mach-imx/clock-imx6q.c +++ b/arch/arm/mach-imx/clock-imx6q.c @@ -1777,6 +1777,7 @@ DEF_CLK(mmdc_ch0_axi_clk, CCGR3, CG10, &periph_clk, &mmdc_ch0_ipg_clk); DEF_CLK(mmdc_ch1_ipg_clk, CCGR3, CG13, &ipg_clk, NULL); DEF_CLK(mmdc_ch1_axi_clk, CCGR3, CG11, &periph2_clk, &mmdc_ch1_ipg_clk); DEF_CLK(openvg_axi_clk, CCGR3, CG13, &axi_clk, NULL); +DEF_CLK(ocram_clk, CCGR3, CG14, &ahb_clk, NULL); DEF_CLK(pwm1_clk, CCGR4, CG8, &ipg_perclk, NULL); DEF_CLK(pwm2_clk, CCGR4, CG9, &ipg_perclk, NULL); DEF_CLK(pwm3_clk, CCGR4, CG10, &ipg_perclk, NULL); @@ -1984,7 +1985,7 @@ int __init mx6q_clocks_init(void) /* only keep necessary clocks on */ writel_relaxed(0x3 << CG0 | 0x3 << CG1 | 0x3 << CG2, CCGR0); writel_relaxed(0x3 << CG8 | 0x3 << CG9 | 0x3 << CG10, CCGR2); - writel_relaxed(0x3 << CG10 | 0x3 << CG12, CCGR3); + writel_relaxed(0x3 << CG10 | 0x3 << CG12 | 0x1 << CG14, CCGR3); writel_relaxed(0x3 << CG4 | 0x3 << CG6 | 0x3 << CG7, CCGR4); writel_relaxed(0x3 << CG0, CCGR5); writel_relaxed(0, CCGR6); diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index bee6334..d69f99f 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -24,6 +24,7 @@ #include #include #include +#include /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */ static int ksz9021rn_phy_fixup(struct phy_device *phydev) @@ -48,6 +49,8 @@ static void __init imx6q_init_machine(void) of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + iram_init(MX6Q_IRAM_BASE_ADDR, MX6Q_IRAM_SIZE); + imx6q_pm_init(); } diff --git a/arch/arm/plat-mxc/include/mach/mx6q.h b/arch/arm/plat-mxc/include/mach/mx6q.h index 254a561..e051ff1 100644 --- a/arch/arm/plat-mxc/include/mach/mx6q.h +++ b/arch/arm/plat-mxc/include/mach/mx6q.h @@ -13,6 +13,8 @@ #ifndef __MACH_MX6Q_H__ #define __MACH_MX6Q_H__ +#include + #define MX6Q_IO_P2V(x) IMX_IO_P2V(x) #define MX6Q_IO_ADDRESS(x) IOMEM(MX6Q_IO_P2V(x)) @@ -30,4 +32,8 @@ #define MX6Q_UART4_BASE_ADDR 0x021f0000 #define MX6Q_UART4_SIZE 0x4000 +/* The last 4K is for cpu hotplug to workaround wdog issue */ +#define MX6Q_IRAM_BASE_ADDR 0x00900000 +#define MX6Q_IRAM_SIZE (SZ_256K - SZ_4K) + #endif /* __MACH_MX6Q_H__ */